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Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef contains configuration information for a flash message.  <a href="struct_x_qspi_psu___msg.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu___config.html">XQspiPsu_Config</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef contains configuration information for the device.  <a href="struct_x_qspi_psu___config.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">The <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> driver instance data.  <a href="struct_x_qspi_psu.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Macros</h2></td></tr>
<tr class="memitem:ga02055aef4b0f9a801005ebdc7b556157"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga02055aef4b0f9a801005ebdc7b556157">MAX_DELAY_CNT</a>&#160;&#160;&#160;1000000000U</td></tr>
<tr class="memdesc:ga02055aef4b0f9a801005ebdc7b556157"><td class="mdescLeft">&#160;</td><td class="mdescRight">Max delay count.  <a href="#ga02055aef4b0f9a801005ebdc7b556157">More...</a><br/></td></tr>
<tr class="separator:ga02055aef4b0f9a801005ebdc7b556157"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaeeb412cbb77c5150bad39b346706a13c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gaeeb412cbb77c5150bad39b346706a13c">XQSPIPSU_H_</a></td></tr>
<tr class="memdesc:gaeeb412cbb77c5150bad39b346706a13c"><td class="mdescLeft">&#160;</td><td class="mdescRight">&lt; prevent circular inclusions  <a href="#gaeeb412cbb77c5150bad39b346706a13c">More...</a><br/></td></tr>
<tr class="separator:gaeeb412cbb77c5150bad39b346706a13c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae555f89da9885e478f966606d733f6cb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gae555f89da9885e478f966606d733f6cb">BYTES256_PER_PAGE</a>&#160;&#160;&#160;256U</td></tr>
<tr class="memdesc:gae555f89da9885e478f966606d733f6cb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Definitions for Intel, STM, Winbond and Spansion Serial Flash Device geometry.  <a href="#gae555f89da9885e478f966606d733f6cb">More...</a><br/></td></tr>
<tr class="separator:gae555f89da9885e478f966606d733f6cb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafa22091b59ed6f3d87feb9ea5e704c08"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gafa22091b59ed6f3d87feb9ea5e704c08">BYTES512_PER_PAGE</a>&#160;&#160;&#160;512U</td></tr>
<tr class="memdesc:gafa22091b59ed6f3d87feb9ea5e704c08"><td class="mdescLeft">&#160;</td><td class="mdescRight">512 Bytes per Page  <a href="#gafa22091b59ed6f3d87feb9ea5e704c08">More...</a><br/></td></tr>
<tr class="separator:gafa22091b59ed6f3d87feb9ea5e704c08"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabda6452f72fa7ac726793c30f048437b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gabda6452f72fa7ac726793c30f048437b">BYTES1024_PER_PAGE</a>&#160;&#160;&#160;1024U</td></tr>
<tr class="memdesc:gabda6452f72fa7ac726793c30f048437b"><td class="mdescLeft">&#160;</td><td class="mdescRight">1024 Bytes per Page  <a href="#gabda6452f72fa7ac726793c30f048437b">More...</a><br/></td></tr>
<tr class="separator:gabda6452f72fa7ac726793c30f048437b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8f6cb585fdfcd437be3327cde9dcbaa3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga8f6cb585fdfcd437be3327cde9dcbaa3">PAGES16_PER_SECTOR</a>&#160;&#160;&#160;16U</td></tr>
<tr class="memdesc:ga8f6cb585fdfcd437be3327cde9dcbaa3"><td class="mdescLeft">&#160;</td><td class="mdescRight">16 Pages per Sector  <a href="#ga8f6cb585fdfcd437be3327cde9dcbaa3">More...</a><br/></td></tr>
<tr class="separator:ga8f6cb585fdfcd437be3327cde9dcbaa3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4ba0770080887dc7e8532410991d1cd0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga4ba0770080887dc7e8532410991d1cd0">PAGES128_PER_SECTOR</a>&#160;&#160;&#160;128U</td></tr>
<tr class="memdesc:ga4ba0770080887dc7e8532410991d1cd0"><td class="mdescLeft">&#160;</td><td class="mdescRight">128 Pages per Sector  <a href="#ga4ba0770080887dc7e8532410991d1cd0">More...</a><br/></td></tr>
<tr class="separator:ga4ba0770080887dc7e8532410991d1cd0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae22160855f0944bf6ac104c86b0205ea"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gae22160855f0944bf6ac104c86b0205ea">PAGES256_PER_SECTOR</a>&#160;&#160;&#160;256U</td></tr>
<tr class="memdesc:gae22160855f0944bf6ac104c86b0205ea"><td class="mdescLeft">&#160;</td><td class="mdescRight">256 Pages per Sector  <a href="#gae22160855f0944bf6ac104c86b0205ea">More...</a><br/></td></tr>
<tr class="separator:gae22160855f0944bf6ac104c86b0205ea"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga245b295583508488ac50031b6a872d8b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga245b295583508488ac50031b6a872d8b">PAGES512_PER_SECTOR</a>&#160;&#160;&#160;512U</td></tr>
<tr class="memdesc:ga245b295583508488ac50031b6a872d8b"><td class="mdescLeft">&#160;</td><td class="mdescRight">512 Pages per Sector  <a href="#ga245b295583508488ac50031b6a872d8b">More...</a><br/></td></tr>
<tr class="separator:ga245b295583508488ac50031b6a872d8b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga316a6040b744597acbda4eec7fb11dc4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga316a6040b744597acbda4eec7fb11dc4">PAGES1024_PER_SECTOR</a>&#160;&#160;&#160;1024U</td></tr>
<tr class="memdesc:ga316a6040b744597acbda4eec7fb11dc4"><td class="mdescLeft">&#160;</td><td class="mdescRight">1024 Pages per Sector  <a href="#ga316a6040b744597acbda4eec7fb11dc4">More...</a><br/></td></tr>
<tr class="separator:ga316a6040b744597acbda4eec7fb11dc4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2f05bc67f1108755e4a4d90b6dc3952a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga2f05bc67f1108755e4a4d90b6dc3952a">NUM_OF_SECTORS2</a>&#160;&#160;&#160;2U</td></tr>
<tr class="memdesc:ga2f05bc67f1108755e4a4d90b6dc3952a"><td class="mdescLeft">&#160;</td><td class="mdescRight">2 Sectors  <a href="#ga2f05bc67f1108755e4a4d90b6dc3952a">More...</a><br/></td></tr>
<tr class="separator:ga2f05bc67f1108755e4a4d90b6dc3952a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac03b6f3c82e81b724869805933e0fecf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gac03b6f3c82e81b724869805933e0fecf">NUM_OF_SECTORS4</a>&#160;&#160;&#160;4U</td></tr>
<tr class="memdesc:gac03b6f3c82e81b724869805933e0fecf"><td class="mdescLeft">&#160;</td><td class="mdescRight">4 Sectors  <a href="#gac03b6f3c82e81b724869805933e0fecf">More...</a><br/></td></tr>
<tr class="separator:gac03b6f3c82e81b724869805933e0fecf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae76ed1fab4655b7f431ccbbd3507c24b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gae76ed1fab4655b7f431ccbbd3507c24b">NUM_OF_SECTORS8</a>&#160;&#160;&#160;8U</td></tr>
<tr class="memdesc:gae76ed1fab4655b7f431ccbbd3507c24b"><td class="mdescLeft">&#160;</td><td class="mdescRight">8 Sector  <a href="#gae76ed1fab4655b7f431ccbbd3507c24b">More...</a><br/></td></tr>
<tr class="separator:gae76ed1fab4655b7f431ccbbd3507c24b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1d5e17491d5265f0225ab0f5c2a06c5d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga1d5e17491d5265f0225ab0f5c2a06c5d">NUM_OF_SECTORS16</a>&#160;&#160;&#160;16U</td></tr>
<tr class="memdesc:ga1d5e17491d5265f0225ab0f5c2a06c5d"><td class="mdescLeft">&#160;</td><td class="mdescRight">16 Sectors  <a href="#ga1d5e17491d5265f0225ab0f5c2a06c5d">More...</a><br/></td></tr>
<tr class="separator:ga1d5e17491d5265f0225ab0f5c2a06c5d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac539ae030c42b7175119ba5eebac3d1e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gac539ae030c42b7175119ba5eebac3d1e">NUM_OF_SECTORS32</a>&#160;&#160;&#160;32U</td></tr>
<tr class="memdesc:gac539ae030c42b7175119ba5eebac3d1e"><td class="mdescLeft">&#160;</td><td class="mdescRight">32 Sectors  <a href="#gac539ae030c42b7175119ba5eebac3d1e">More...</a><br/></td></tr>
<tr class="separator:gac539ae030c42b7175119ba5eebac3d1e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga68349ca2530e582759ebed4d3c059715"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga68349ca2530e582759ebed4d3c059715">NUM_OF_SECTORS64</a>&#160;&#160;&#160;64U</td></tr>
<tr class="memdesc:ga68349ca2530e582759ebed4d3c059715"><td class="mdescLeft">&#160;</td><td class="mdescRight">64 Sectors  <a href="#ga68349ca2530e582759ebed4d3c059715">More...</a><br/></td></tr>
<tr class="separator:ga68349ca2530e582759ebed4d3c059715"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf596e2100925c36df243bcdb30d3bead"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gaf596e2100925c36df243bcdb30d3bead">NUM_OF_SECTORS128</a>&#160;&#160;&#160;128U</td></tr>
<tr class="memdesc:gaf596e2100925c36df243bcdb30d3bead"><td class="mdescLeft">&#160;</td><td class="mdescRight">128 Sectors  <a href="#gaf596e2100925c36df243bcdb30d3bead">More...</a><br/></td></tr>
<tr class="separator:gaf596e2100925c36df243bcdb30d3bead"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga65aff8cefc65fd54c112220a6dba7d72"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga65aff8cefc65fd54c112220a6dba7d72">NUM_OF_SECTORS256</a>&#160;&#160;&#160;256U</td></tr>
<tr class="memdesc:ga65aff8cefc65fd54c112220a6dba7d72"><td class="mdescLeft">&#160;</td><td class="mdescRight">256 Sectors  <a href="#ga65aff8cefc65fd54c112220a6dba7d72">More...</a><br/></td></tr>
<tr class="separator:ga65aff8cefc65fd54c112220a6dba7d72"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga157510b7e2dc33102c6d445849ea0539"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga157510b7e2dc33102c6d445849ea0539">NUM_OF_SECTORS512</a>&#160;&#160;&#160;512U</td></tr>
<tr class="memdesc:ga157510b7e2dc33102c6d445849ea0539"><td class="mdescLeft">&#160;</td><td class="mdescRight">512 Sectors  <a href="#ga157510b7e2dc33102c6d445849ea0539">More...</a><br/></td></tr>
<tr class="separator:ga157510b7e2dc33102c6d445849ea0539"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4fd9659b4df1e9ffc7840aea4bf9c860"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga4fd9659b4df1e9ffc7840aea4bf9c860">NUM_OF_SECTORS1024</a>&#160;&#160;&#160;1024U</td></tr>
<tr class="memdesc:ga4fd9659b4df1e9ffc7840aea4bf9c860"><td class="mdescLeft">&#160;</td><td class="mdescRight">1024 Sectors  <a href="#ga4fd9659b4df1e9ffc7840aea4bf9c860">More...</a><br/></td></tr>
<tr class="separator:ga4fd9659b4df1e9ffc7840aea4bf9c860"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7627c908fc89c896508f59ab962a9f90"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga7627c908fc89c896508f59ab962a9f90">NUM_OF_SECTORS2048</a>&#160;&#160;&#160;2048U</td></tr>
<tr class="memdesc:ga7627c908fc89c896508f59ab962a9f90"><td class="mdescLeft">&#160;</td><td class="mdescRight">2048 Sectors  <a href="#ga7627c908fc89c896508f59ab962a9f90">More...</a><br/></td></tr>
<tr class="separator:ga7627c908fc89c896508f59ab962a9f90"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadf357dd80cd00a94db0d59b0b26e0994"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gadf357dd80cd00a94db0d59b0b26e0994">NUM_OF_SECTORS4096</a>&#160;&#160;&#160;4096U</td></tr>
<tr class="memdesc:gadf357dd80cd00a94db0d59b0b26e0994"><td class="mdescLeft">&#160;</td><td class="mdescRight">4096 Sectors  <a href="#gadf357dd80cd00a94db0d59b0b26e0994">More...</a><br/></td></tr>
<tr class="separator:gadf357dd80cd00a94db0d59b0b26e0994"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf0c1bb203cfb920a65ed1bf7658a592c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gaf0c1bb203cfb920a65ed1bf7658a592c">NUM_OF_SECTORS8192</a>&#160;&#160;&#160;8192U</td></tr>
<tr class="memdesc:gaf0c1bb203cfb920a65ed1bf7658a592c"><td class="mdescLeft">&#160;</td><td class="mdescRight">8192 Sectors  <a href="#gaf0c1bb203cfb920a65ed1bf7658a592c">More...</a><br/></td></tr>
<tr class="separator:gaf0c1bb203cfb920a65ed1bf7658a592c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf7b4349b24320ffc1c4bf957149635ad"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gaf7b4349b24320ffc1c4bf957149635ad">SECTOR_SIZE_64K</a>&#160;&#160;&#160;0X10000U</td></tr>
<tr class="memdesc:gaf7b4349b24320ffc1c4bf957149635ad"><td class="mdescLeft">&#160;</td><td class="mdescRight">64K Sector  <a href="#gaf7b4349b24320ffc1c4bf957149635ad">More...</a><br/></td></tr>
<tr class="separator:gaf7b4349b24320ffc1c4bf957149635ad"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga645c1791a368efc87d7856165b1cf20a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga645c1791a368efc87d7856165b1cf20a">SECTOR_SIZE_128K</a>&#160;&#160;&#160;0X20000U</td></tr>
<tr class="memdesc:ga645c1791a368efc87d7856165b1cf20a"><td class="mdescLeft">&#160;</td><td class="mdescRight">128K Sector  <a href="#ga645c1791a368efc87d7856165b1cf20a">More...</a><br/></td></tr>
<tr class="separator:ga645c1791a368efc87d7856165b1cf20a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga24583aac10a7dc8d022da0fe1b1812ca"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga24583aac10a7dc8d022da0fe1b1812ca">SECTOR_SIZE_256K</a>&#160;&#160;&#160;0X40000U</td></tr>
<tr class="memdesc:ga24583aac10a7dc8d022da0fe1b1812ca"><td class="mdescLeft">&#160;</td><td class="mdescRight">256K Sector  <a href="#ga24583aac10a7dc8d022da0fe1b1812ca">More...</a><br/></td></tr>
<tr class="separator:ga24583aac10a7dc8d022da0fe1b1812ca"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf55253fc7f2d508133e14d927c3b5621"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gaf55253fc7f2d508133e14d927c3b5621">SECTOR_SIZE_512K</a>&#160;&#160;&#160;0X80000U</td></tr>
<tr class="memdesc:gaf55253fc7f2d508133e14d927c3b5621"><td class="mdescLeft">&#160;</td><td class="mdescRight">512K Sector  <a href="#gaf55253fc7f2d508133e14d927c3b5621">More...</a><br/></td></tr>
<tr class="separator:gaf55253fc7f2d508133e14d927c3b5621"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6e5ef224ee243dc64228ad60155a3f8b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga6e5ef224ee243dc64228ad60155a3f8b">XQSPIPSU_READMODE_DMA</a>&#160;&#160;&#160;0x0U</td></tr>
<tr class="memdesc:ga6e5ef224ee243dc64228ad60155a3f8b"><td class="mdescLeft">&#160;</td><td class="mdescRight">DMA read mode.  <a href="#ga6e5ef224ee243dc64228ad60155a3f8b">More...</a><br/></td></tr>
<tr class="separator:ga6e5ef224ee243dc64228ad60155a3f8b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafd11c8b8f44530c3670d2ac7497fb2fc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gafd11c8b8f44530c3670d2ac7497fb2fc">XQSPIPSU_READMODE_IO</a>&#160;&#160;&#160;0x1U</td></tr>
<tr class="memdesc:gafd11c8b8f44530c3670d2ac7497fb2fc"><td class="mdescLeft">&#160;</td><td class="mdescRight">IO read mode.  <a href="#gafd11c8b8f44530c3670d2ac7497fb2fc">More...</a><br/></td></tr>
<tr class="separator:gafd11c8b8f44530c3670d2ac7497fb2fc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4c5dd4c0387f6ae12a78b86c653bb74d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga4c5dd4c0387f6ae12a78b86c653bb74d">XQSPIPSU_SELECT_FLASH_CS_LOWER</a>&#160;&#160;&#160;0x1U</td></tr>
<tr class="memdesc:ga4c5dd4c0387f6ae12a78b86c653bb74d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Select lower flash.  <a href="#ga4c5dd4c0387f6ae12a78b86c653bb74d">More...</a><br/></td></tr>
<tr class="separator:ga4c5dd4c0387f6ae12a78b86c653bb74d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2211df126779f654595c9663f5624ba4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga2211df126779f654595c9663f5624ba4">XQSPIPSU_SELECT_FLASH_CS_UPPER</a>&#160;&#160;&#160;0x2U</td></tr>
<tr class="memdesc:ga2211df126779f654595c9663f5624ba4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Select upper flash.  <a href="#ga2211df126779f654595c9663f5624ba4">More...</a><br/></td></tr>
<tr class="separator:ga2211df126779f654595c9663f5624ba4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab8fb3a2887dbf0331cc9057afea0ec53"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gab8fb3a2887dbf0331cc9057afea0ec53">XQSPIPSU_SELECT_FLASH_CS_BOTH</a>&#160;&#160;&#160;0x3U</td></tr>
<tr class="memdesc:gab8fb3a2887dbf0331cc9057afea0ec53"><td class="mdescLeft">&#160;</td><td class="mdescRight">Select both flash.  <a href="#gab8fb3a2887dbf0331cc9057afea0ec53">More...</a><br/></td></tr>
<tr class="separator:gab8fb3a2887dbf0331cc9057afea0ec53"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2d896ad5edf8b15e6dbd4d7a87517a35"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga2d896ad5edf8b15e6dbd4d7a87517a35">XQSPIPSU_SELECT_FLASH_BUS_LOWER</a>&#160;&#160;&#160;0x1U</td></tr>
<tr class="memdesc:ga2d896ad5edf8b15e6dbd4d7a87517a35"><td class="mdescLeft">&#160;</td><td class="mdescRight">Select lower bus flash.  <a href="#ga2d896ad5edf8b15e6dbd4d7a87517a35">More...</a><br/></td></tr>
<tr class="separator:ga2d896ad5edf8b15e6dbd4d7a87517a35"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9eeab1d9cd47c4a0281d9188d3072444"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga9eeab1d9cd47c4a0281d9188d3072444">XQSPIPSU_SELECT_FLASH_BUS_UPPER</a>&#160;&#160;&#160;0x2U</td></tr>
<tr class="memdesc:ga9eeab1d9cd47c4a0281d9188d3072444"><td class="mdescLeft">&#160;</td><td class="mdescRight">Select upper bus flash.  <a href="#ga9eeab1d9cd47c4a0281d9188d3072444">More...</a><br/></td></tr>
<tr class="separator:ga9eeab1d9cd47c4a0281d9188d3072444"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5d8490a76bf6be3a4655e3fa8e90a19f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga5d8490a76bf6be3a4655e3fa8e90a19f">XQSPIPSU_SELECT_FLASH_BUS_BOTH</a>&#160;&#160;&#160;0x3U</td></tr>
<tr class="memdesc:ga5d8490a76bf6be3a4655e3fa8e90a19f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Select both bus flash.  <a href="#ga5d8490a76bf6be3a4655e3fa8e90a19f">More...</a><br/></td></tr>
<tr class="separator:ga5d8490a76bf6be3a4655e3fa8e90a19f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga185ba58041ded76c03bb18ad69e783af"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga185ba58041ded76c03bb18ad69e783af">XQSPIPSU_SELECT_MODE_SPI</a>&#160;&#160;&#160;0x1U</td></tr>
<tr class="memdesc:ga185ba58041ded76c03bb18ad69e783af"><td class="mdescLeft">&#160;</td><td class="mdescRight">Select SPI mode.  <a href="#ga185ba58041ded76c03bb18ad69e783af">More...</a><br/></td></tr>
<tr class="separator:ga185ba58041ded76c03bb18ad69e783af"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa57e6e6b6efaaa981a9a81ae9db3d78a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gaa57e6e6b6efaaa981a9a81ae9db3d78a">XQSPIPSU_SELECT_MODE_DUALSPI</a>&#160;&#160;&#160;0x2U</td></tr>
<tr class="memdesc:gaa57e6e6b6efaaa981a9a81ae9db3d78a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Select dual SPI mode.  <a href="#gaa57e6e6b6efaaa981a9a81ae9db3d78a">More...</a><br/></td></tr>
<tr class="separator:gaa57e6e6b6efaaa981a9a81ae9db3d78a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6750df2d9d9169fdef76bfc957ae501c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga6750df2d9d9169fdef76bfc957ae501c">XQSPIPSU_SELECT_MODE_QUADSPI</a>&#160;&#160;&#160;0x4U</td></tr>
<tr class="memdesc:ga6750df2d9d9169fdef76bfc957ae501c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Select quad SPI mode.  <a href="#ga6750df2d9d9169fdef76bfc957ae501c">More...</a><br/></td></tr>
<tr class="separator:ga6750df2d9d9169fdef76bfc957ae501c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa18ef26888b9b8f28135654a310b5924"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gaa18ef26888b9b8f28135654a310b5924">XQSPIPSU_GENFIFO_CS_SETUP</a>&#160;&#160;&#160;0x05U</td></tr>
<tr class="memdesc:gaa18ef26888b9b8f28135654a310b5924"><td class="mdescLeft">&#160;</td><td class="mdescRight">Chip select setup in GENFIO.  <a href="#gaa18ef26888b9b8f28135654a310b5924">More...</a><br/></td></tr>
<tr class="separator:gaa18ef26888b9b8f28135654a310b5924"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga74b7854d095af4f443a976b426cfde7e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga74b7854d095af4f443a976b426cfde7e">XQSPIPSU_GENFIFO_CS_HOLD</a>&#160;&#160;&#160;0x04U</td></tr>
<tr class="memdesc:ga74b7854d095af4f443a976b426cfde7e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Chip select hold in GENFIFO.  <a href="#ga74b7854d095af4f443a976b426cfde7e">More...</a><br/></td></tr>
<tr class="separator:ga74b7854d095af4f443a976b426cfde7e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5f92c1428dba9ddfbe53c5322ab85f60"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga5f92c1428dba9ddfbe53c5322ab85f60">XQSPIPSU_CLK_ACTIVE_LOW_OPTION</a>&#160;&#160;&#160;0x2U</td></tr>
<tr class="memdesc:ga5f92c1428dba9ddfbe53c5322ab85f60"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clk Active low option.  <a href="#ga5f92c1428dba9ddfbe53c5322ab85f60">More...</a><br/></td></tr>
<tr class="separator:ga5f92c1428dba9ddfbe53c5322ab85f60"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaf184726885a8746f3491828cf567789"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gaaf184726885a8746f3491828cf567789">XQSPIPSU_CLK_PHASE_1_OPTION</a>&#160;&#160;&#160;0x4U</td></tr>
<tr class="memdesc:gaaf184726885a8746f3491828cf567789"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clk phase 1 option.  <a href="#gaaf184726885a8746f3491828cf567789">More...</a><br/></td></tr>
<tr class="separator:gaaf184726885a8746f3491828cf567789"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga47c246bab4c5d4f6c8ff84e44049adc9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga47c246bab4c5d4f6c8ff84e44049adc9">XQSPIPSU_MANUAL_START_OPTION</a>&#160;&#160;&#160;0x8U</td></tr>
<tr class="memdesc:ga47c246bab4c5d4f6c8ff84e44049adc9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Manual start option.  <a href="#ga47c246bab4c5d4f6c8ff84e44049adc9">More...</a><br/></td></tr>
<tr class="separator:ga47c246bab4c5d4f6c8ff84e44049adc9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf4dde3aacf0091e9d1748b1b915648a0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gaf4dde3aacf0091e9d1748b1b915648a0">XQSPIPSU_LQSPI_MODE_OPTION</a>&#160;&#160;&#160;0x20U</td></tr>
<tr class="memdesc:gaf4dde3aacf0091e9d1748b1b915648a0"><td class="mdescLeft">&#160;</td><td class="mdescRight">LQSPI mode option.  <a href="#gaf4dde3aacf0091e9d1748b1b915648a0">More...</a><br/></td></tr>
<tr class="separator:gaf4dde3aacf0091e9d1748b1b915648a0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9e5fb7239c5d7fbadc688e29c3fb087d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga9e5fb7239c5d7fbadc688e29c3fb087d">XQSPIPSU_LQSPI_LESS_THEN_SIXTEENMB</a>&#160;&#160;&#160;1U</td></tr>
<tr class="memdesc:ga9e5fb7239c5d7fbadc688e29c3fb087d"><td class="mdescLeft">&#160;</td><td class="mdescRight">LQSPI less Than 16 MB.  <a href="#ga9e5fb7239c5d7fbadc688e29c3fb087d">More...</a><br/></td></tr>
<tr class="separator:ga9e5fb7239c5d7fbadc688e29c3fb087d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9910c1e3f79127836cade9970a9df537"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga9910c1e3f79127836cade9970a9df537">XQSPIPSU_GENFIFO_EXP_START</a>&#160;&#160;&#160;0x100U</td></tr>
<tr class="memdesc:ga9910c1e3f79127836cade9970a9df537"><td class="mdescLeft">&#160;</td><td class="mdescRight">Genfifo start.  <a href="#ga9910c1e3f79127836cade9970a9df537">More...</a><br/></td></tr>
<tr class="separator:ga9910c1e3f79127836cade9970a9df537"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafa633d08d4bcacadc20f2696665edb75"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gafa633d08d4bcacadc20f2696665edb75">XQSPIPSU_DMA_BYTES_MAX</a>&#160;&#160;&#160;0x10000000U</td></tr>
<tr class="memdesc:gafa633d08d4bcacadc20f2696665edb75"><td class="mdescLeft">&#160;</td><td class="mdescRight">DMA bytes max.  <a href="#gafa633d08d4bcacadc20f2696665edb75">More...</a><br/></td></tr>
<tr class="separator:gafa633d08d4bcacadc20f2696665edb75"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga282e0a0766d2bb5d1394f988822f705b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga282e0a0766d2bb5d1394f988822f705b">XQSPIPSU_CLK_PRESCALE_2</a>&#160;&#160;&#160;0x00U</td></tr>
<tr class="memdesc:ga282e0a0766d2bb5d1394f988822f705b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clock prescale 2.  <a href="#ga282e0a0766d2bb5d1394f988822f705b">More...</a><br/></td></tr>
<tr class="separator:ga282e0a0766d2bb5d1394f988822f705b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf20988bd132defabd58b714360e2d900"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gaf20988bd132defabd58b714360e2d900">XQSPIPSU_CLK_PRESCALE_4</a>&#160;&#160;&#160;0x01U</td></tr>
<tr class="memdesc:gaf20988bd132defabd58b714360e2d900"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clock prescale 4.  <a href="#gaf20988bd132defabd58b714360e2d900">More...</a><br/></td></tr>
<tr class="separator:gaf20988bd132defabd58b714360e2d900"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga37ca68c0fddda883028f393eb5626437"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga37ca68c0fddda883028f393eb5626437">XQSPIPSU_CLK_PRESCALE_8</a>&#160;&#160;&#160;0x02U</td></tr>
<tr class="memdesc:ga37ca68c0fddda883028f393eb5626437"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clock prescale 8.  <a href="#ga37ca68c0fddda883028f393eb5626437">More...</a><br/></td></tr>
<tr class="separator:ga37ca68c0fddda883028f393eb5626437"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaeb4ea545b7f20a35517850210c69f8eb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gaeb4ea545b7f20a35517850210c69f8eb">XQSPIPSU_CLK_PRESCALE_16</a>&#160;&#160;&#160;0x03U</td></tr>
<tr class="memdesc:gaeb4ea545b7f20a35517850210c69f8eb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clock prescale 16.  <a href="#gaeb4ea545b7f20a35517850210c69f8eb">More...</a><br/></td></tr>
<tr class="separator:gaeb4ea545b7f20a35517850210c69f8eb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1bb7e07e34628bde17347f45665d658d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga1bb7e07e34628bde17347f45665d658d">XQSPIPSU_CLK_PRESCALE_32</a>&#160;&#160;&#160;0x04U</td></tr>
<tr class="memdesc:ga1bb7e07e34628bde17347f45665d658d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clock prescale 32.  <a href="#ga1bb7e07e34628bde17347f45665d658d">More...</a><br/></td></tr>
<tr class="separator:ga1bb7e07e34628bde17347f45665d658d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga617bfea4aaac9e96cf64dc511b5e1571"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga617bfea4aaac9e96cf64dc511b5e1571">XQSPIPSU_CLK_PRESCALE_64</a>&#160;&#160;&#160;0x05U</td></tr>
<tr class="memdesc:ga617bfea4aaac9e96cf64dc511b5e1571"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clock prescale 64.  <a href="#ga617bfea4aaac9e96cf64dc511b5e1571">More...</a><br/></td></tr>
<tr class="separator:ga617bfea4aaac9e96cf64dc511b5e1571"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa2b9483e70d14d8c089d5ea8137493bb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gaa2b9483e70d14d8c089d5ea8137493bb">XQSPIPSU_CLK_PRESCALE_128</a>&#160;&#160;&#160;0x06U</td></tr>
<tr class="memdesc:gaa2b9483e70d14d8c089d5ea8137493bb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clock prescale 128.  <a href="#gaa2b9483e70d14d8c089d5ea8137493bb">More...</a><br/></td></tr>
<tr class="separator:gaa2b9483e70d14d8c089d5ea8137493bb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad11dc937000484649724060d0bcdf00c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gad11dc937000484649724060d0bcdf00c">XQSPIPSU_CLK_PRESCALE_256</a>&#160;&#160;&#160;0x07U</td></tr>
<tr class="memdesc:gad11dc937000484649724060d0bcdf00c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clock prescale 256.  <a href="#gad11dc937000484649724060d0bcdf00c">More...</a><br/></td></tr>
<tr class="separator:gad11dc937000484649724060d0bcdf00c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae53e5d9f18e5fe950d0ce0165880bb7f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gae53e5d9f18e5fe950d0ce0165880bb7f">XQSPIPSU_CR_PRESC_MAXIMUM</a>&#160;&#160;&#160;7U</td></tr>
<tr class="memdesc:gae53e5d9f18e5fe950d0ce0165880bb7f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Prescale max.  <a href="#gae53e5d9f18e5fe950d0ce0165880bb7f">More...</a><br/></td></tr>
<tr class="separator:gae53e5d9f18e5fe950d0ce0165880bb7f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga19d7a74e6402f4ba3cd33fe08602447d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga19d7a74e6402f4ba3cd33fe08602447d">XQSPIPSU_CONNECTION_MODE_SINGLE</a>&#160;&#160;&#160;0U</td></tr>
<tr class="memdesc:ga19d7a74e6402f4ba3cd33fe08602447d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Single mode connection.  <a href="#ga19d7a74e6402f4ba3cd33fe08602447d">More...</a><br/></td></tr>
<tr class="separator:ga19d7a74e6402f4ba3cd33fe08602447d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacddf674343015377edb4198800b6549b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gacddf674343015377edb4198800b6549b">XQSPIPSU_CONNECTION_MODE_STACKED</a>&#160;&#160;&#160;1U</td></tr>
<tr class="memdesc:gacddf674343015377edb4198800b6549b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Stacked mode connection.  <a href="#gacddf674343015377edb4198800b6549b">More...</a><br/></td></tr>
<tr class="separator:gacddf674343015377edb4198800b6549b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga493629a6f3d8fb0312dbcaf3e9cbe0e8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga493629a6f3d8fb0312dbcaf3e9cbe0e8">XQSPIPSU_CONNECTION_MODE_PARALLEL</a>&#160;&#160;&#160;2U</td></tr>
<tr class="memdesc:ga493629a6f3d8fb0312dbcaf3e9cbe0e8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Parallel mode connection.  <a href="#ga493629a6f3d8fb0312dbcaf3e9cbe0e8">More...</a><br/></td></tr>
<tr class="separator:ga493629a6f3d8fb0312dbcaf3e9cbe0e8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacb92bc4c932f3cb76254d29c165422ad"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gacb92bc4c932f3cb76254d29c165422ad">XQSPIPSU_FREQ_37_5MHZ</a>&#160;&#160;&#160;37500000U</td></tr>
<tr class="memdesc:gacb92bc4c932f3cb76254d29c165422ad"><td class="mdescLeft">&#160;</td><td class="mdescRight">Frequency 375 Mhz.  <a href="#gacb92bc4c932f3cb76254d29c165422ad">More...</a><br/></td></tr>
<tr class="separator:gacb92bc4c932f3cb76254d29c165422ad"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga648e23a989497067a390c6805c38b986"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga648e23a989497067a390c6805c38b986">XQSPIPSU_FREQ_40MHZ</a>&#160;&#160;&#160;40000000U</td></tr>
<tr class="memdesc:ga648e23a989497067a390c6805c38b986"><td class="mdescLeft">&#160;</td><td class="mdescRight">Frequency 40 Mhz.  <a href="#ga648e23a989497067a390c6805c38b986">More...</a><br/></td></tr>
<tr class="separator:ga648e23a989497067a390c6805c38b986"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad7d635f9e12162067b8dbd3bd437e000"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gad7d635f9e12162067b8dbd3bd437e000">XQSPIPSU_FREQ_100MHZ</a>&#160;&#160;&#160;100000000U</td></tr>
<tr class="memdesc:gad7d635f9e12162067b8dbd3bd437e000"><td class="mdescLeft">&#160;</td><td class="mdescRight">Frequency 100 Mhz.  <a href="#gad7d635f9e12162067b8dbd3bd437e000">More...</a><br/></td></tr>
<tr class="separator:gad7d635f9e12162067b8dbd3bd437e000"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad8a6ec59576728197764eeab0b5a5eef"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gad8a6ec59576728197764eeab0b5a5eef">XQSPIPSU_FREQ_150MHZ</a>&#160;&#160;&#160;150000000U</td></tr>
<tr class="memdesc:gad8a6ec59576728197764eeab0b5a5eef"><td class="mdescLeft">&#160;</td><td class="mdescRight">Frequency 150 Mhz.  <a href="#gad8a6ec59576728197764eeab0b5a5eef">More...</a><br/></td></tr>
<tr class="separator:gad8a6ec59576728197764eeab0b5a5eef"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga767a4572b5fe31cd9ff390c44d25e968"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga767a4572b5fe31cd9ff390c44d25e968">XQSPIPSU_MSG_FLAG_STRIPE</a>&#160;&#160;&#160;0x1U</td></tr>
<tr class="memdesc:ga767a4572b5fe31cd9ff390c44d25e968"><td class="mdescLeft">&#160;</td><td class="mdescRight">Stripe Msg flag.  <a href="#ga767a4572b5fe31cd9ff390c44d25e968">More...</a><br/></td></tr>
<tr class="separator:ga767a4572b5fe31cd9ff390c44d25e968"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacdde904168f5899e4ba6ccd59c360849"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gacdde904168f5899e4ba6ccd59c360849">XQSPIPSU_MSG_FLAG_RX</a>&#160;&#160;&#160;0x2U</td></tr>
<tr class="memdesc:gacdde904168f5899e4ba6ccd59c360849"><td class="mdescLeft">&#160;</td><td class="mdescRight">Rx Msg flag.  <a href="#gacdde904168f5899e4ba6ccd59c360849">More...</a><br/></td></tr>
<tr class="separator:gacdde904168f5899e4ba6ccd59c360849"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae82f60c2162c93b8e302125914d8aab6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gae82f60c2162c93b8e302125914d8aab6">XQSPIPSU_MSG_FLAG_TX</a>&#160;&#160;&#160;0x4U</td></tr>
<tr class="memdesc:gae82f60c2162c93b8e302125914d8aab6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Tx Msg flag.  <a href="#gae82f60c2162c93b8e302125914d8aab6">More...</a><br/></td></tr>
<tr class="separator:gae82f60c2162c93b8e302125914d8aab6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad4bd22b7d06c85885fafdae994e1c86a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gad4bd22b7d06c85885fafdae994e1c86a">XQSPIPSU_MSG_FLAG_POLL</a>&#160;&#160;&#160;0x8U</td></tr>
<tr class="memdesc:gad4bd22b7d06c85885fafdae994e1c86a"><td class="mdescLeft">&#160;</td><td class="mdescRight">POLL Msg flag.  <a href="#gad4bd22b7d06c85885fafdae994e1c86a">More...</a><br/></td></tr>
<tr class="separator:gad4bd22b7d06c85885fafdae994e1c86a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad6a88bdae8e13bd8cd48bb9e6d565610"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gad6a88bdae8e13bd8cd48bb9e6d565610">XQSPIPSU_RXADDR_OVER_32BIT</a>&#160;&#160;&#160;0x100000000U</td></tr>
<tr class="memdesc:gad6a88bdae8e13bd8cd48bb9e6d565610"><td class="mdescLeft">&#160;</td><td class="mdescRight">Rx address over 32 bit.  <a href="#gad6a88bdae8e13bd8cd48bb9e6d565610">More...</a><br/></td></tr>
<tr class="separator:gad6a88bdae8e13bd8cd48bb9e6d565610"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9d60815d3d62d01558f5ece03f79da51"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga9d60815d3d62d01558f5ece03f79da51">XQSPIPSU_SET_WP</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:ga9d60815d3d62d01558f5ece03f79da51"><td class="mdescLeft">&#160;</td><td class="mdescRight">GQSPI configuration to toggle WP of flash.  <a href="#ga9d60815d3d62d01558f5ece03f79da51">More...</a><br/></td></tr>
<tr class="separator:ga9d60815d3d62d01558f5ece03f79da51"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga389021b0119ed0e51648c4d4b984b98a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga389021b0119ed0e51648c4d4b984b98a">XQspiPsu_Select</a>(InstancePtr, Mask)</td></tr>
<tr class="memdesc:ga389021b0119ed0e51648c4d4b984b98a"><td class="mdescLeft">&#160;</td><td class="mdescRight">select QSPI controller  <a href="#ga389021b0119ed0e51648c4d4b984b98a">More...</a><br/></td></tr>
<tr class="separator:ga389021b0119ed0e51648c4d4b984b98a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa44815f385a69052a3f637f57428f506"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gaa44815f385a69052a3f637f57428f506">XQspiPsu_Enable</a>(InstancePtr)</td></tr>
<tr class="memdesc:gaa44815f385a69052a3f637f57428f506"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable QSPI Controller.  <a href="#gaa44815f385a69052a3f637f57428f506">More...</a><br/></td></tr>
<tr class="separator:gaa44815f385a69052a3f637f57428f506"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga06dd7ccdefd898567875836018f87dcb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga06dd7ccdefd898567875836018f87dcb">XQspiPsu_Disable</a>(InstancePtr)</td></tr>
<tr class="memdesc:ga06dd7ccdefd898567875836018f87dcb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable QSPI controller.  <a href="#ga06dd7ccdefd898567875836018f87dcb">More...</a><br/></td></tr>
<tr class="separator:ga06dd7ccdefd898567875836018f87dcb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6079956c578f636665b87ca5f60b8bad"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga6079956c578f636665b87ca5f60b8bad">XQspiPsu_GetLqspiConfigReg</a>(InstancePtr)</td></tr>
<tr class="memdesc:ga6079956c578f636665b87ca5f60b8bad"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read Configuration register of LQSPI Controller.  <a href="#ga6079956c578f636665b87ca5f60b8bad">More...</a><br/></td></tr>
<tr class="separator:ga6079956c578f636665b87ca5f60b8bad"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7270573aac2e897d40123dcb0a181aac"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga7270573aac2e897d40123dcb0a181aac">XQSPIPSU_NUM_OPTIONS</a>&#160;&#160;&#160;(sizeof(OptionsTable) / sizeof(OptionsMap))</td></tr>
<tr class="memdesc:ga7270573aac2e897d40123dcb0a181aac"><td class="mdescLeft">&#160;</td><td class="mdescRight">Number of options in option table.  <a href="#ga7270573aac2e897d40123dcb0a181aac">More...</a><br/></td></tr>
<tr class="separator:ga7270573aac2e897d40123dcb0a181aac"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga02055aef4b0f9a801005ebdc7b556157"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga02055aef4b0f9a801005ebdc7b556157">MAX_DELAY_CNT</a>&#160;&#160;&#160;1000000000U</td></tr>
<tr class="memdesc:ga02055aef4b0f9a801005ebdc7b556157"><td class="mdescLeft">&#160;</td><td class="mdescRight">Max delay count.  <a href="#ga02055aef4b0f9a801005ebdc7b556157">More...</a><br/></td></tr>
<tr class="separator:ga02055aef4b0f9a801005ebdc7b556157"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="typedef-members"></a>
Typedefs</h2></td></tr>
<tr class="memitem:ga4fcad0707fd0557232bc94a8c3ba1fea"><td class="memItemLeft" align="right" valign="top">typedef void(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga4fcad0707fd0557232bc94a8c3ba1fea">XQspiPsu_StatusHandler</a> )(const void *CallBackRef, u32 StatusEvent, u32 ByteCount)</td></tr>
<tr class="memdesc:ga4fcad0707fd0557232bc94a8c3ba1fea"><td class="mdescLeft">&#160;</td><td class="mdescRight">The handler data type allows the user to define a callback function to handle the asynchronous processing for the QSPIPSU device.  <a href="#ga4fcad0707fd0557232bc94a8c3ba1fea">More...</a><br/></td></tr>
<tr class="separator:ga4fcad0707fd0557232bc94a8c3ba1fea"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:ga803eccd67d1dfde416b54488865c1e9d"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga803eccd67d1dfde416b54488865c1e9d">XQspiPsu_CfgInitialize</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, const <a class="el" href="struct_x_qspi_psu___config.html">XQspiPsu_Config</a> *ConfigPtr, UINTPTR EffectiveAddr)</td></tr>
<tr class="memdesc:ga803eccd67d1dfde416b54488865c1e9d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initializes a specific <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance as such the driver is ready to use.  <a href="#ga803eccd67d1dfde416b54488865c1e9d">More...</a><br/></td></tr>
<tr class="separator:ga803eccd67d1dfde416b54488865c1e9d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga46a8ddc9fc0b6f9e2d616de84d9c7ed5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga46a8ddc9fc0b6f9e2d616de84d9c7ed5">XQspiPsu_Idle</a> (const <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga46a8ddc9fc0b6f9e2d616de84d9c7ed5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Stops the transfer of data to internal DST FIFO from stream interface and also stops the issuing of new write commands to memory.  <a href="#ga46a8ddc9fc0b6f9e2d616de84d9c7ed5">More...</a><br/></td></tr>
<tr class="separator:ga46a8ddc9fc0b6f9e2d616de84d9c7ed5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga799b60ee7157ed46b84475677aa0dc03"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga799b60ee7157ed46b84475677aa0dc03">XQspiPsu_Reset</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga799b60ee7157ed46b84475677aa0dc03"><td class="mdescLeft">&#160;</td><td class="mdescRight">Resets the QSPIPSU device.  <a href="#ga799b60ee7157ed46b84475677aa0dc03">More...</a><br/></td></tr>
<tr class="separator:ga799b60ee7157ed46b84475677aa0dc03"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaa69ec6da90deb760954ea3dcfd55d7f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gaaa69ec6da90deb760954ea3dcfd55d7f">XQspiPsu_Abort</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr)</td></tr>
<tr class="memdesc:gaaa69ec6da90deb760954ea3dcfd55d7f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Aborts a transfer in progress.  <a href="#gaaa69ec6da90deb760954ea3dcfd55d7f">More...</a><br/></td></tr>
<tr class="separator:gaaa69ec6da90deb760954ea3dcfd55d7f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5f083afb4ec79c542a7c7098a519d771"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga5f083afb4ec79c542a7c7098a519d771">XQspiPsu_PollDataHandler</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, u32 StatusReg)</td></tr>
<tr class="memdesc:ga5f083afb4ec79c542a7c7098a519d771"><td class="mdescLeft">&#160;</td><td class="mdescRight">This is the handler for polling functionality of controller.  <a href="#ga5f083afb4ec79c542a7c7098a519d771">More...</a><br/></td></tr>
<tr class="separator:ga5f083afb4ec79c542a7c7098a519d771"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga61de390e2bc4af0ce77448a46763ea39"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga61de390e2bc4af0ce77448a46763ea39">XQspiPsu_PolledTransfer</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *Msg, u32 NumMsg)</td></tr>
<tr class="memdesc:ga61de390e2bc4af0ce77448a46763ea39"><td class="mdescLeft">&#160;</td><td class="mdescRight">Performs a transfer on the bus in polled mode.  <a href="#ga61de390e2bc4af0ce77448a46763ea39">More...</a><br/></td></tr>
<tr class="separator:ga61de390e2bc4af0ce77448a46763ea39"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6ae727534cf55b878b9b1974dc72a625"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga6ae727534cf55b878b9b1974dc72a625">XQspiPsu_InterruptTransfer</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *Msg, u32 NumMsg)</td></tr>
<tr class="memdesc:ga6ae727534cf55b878b9b1974dc72a625"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initiates a transfer on the bus and enables interrupts.  <a href="#ga6ae727534cf55b878b9b1974dc72a625">More...</a><br/></td></tr>
<tr class="separator:ga6ae727534cf55b878b9b1974dc72a625"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa345ea3ab3694a94a60e6217cb8d5e59"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gaa345ea3ab3694a94a60e6217cb8d5e59">XQspiPsu_InterruptHandler</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr)</td></tr>
<tr class="memdesc:gaa345ea3ab3694a94a60e6217cb8d5e59"><td class="mdescLeft">&#160;</td><td class="mdescRight">Handles interrupt based transfers by acting on GENFIFO and DMA interurpts.  <a href="#gaa345ea3ab3694a94a60e6217cb8d5e59">More...</a><br/></td></tr>
<tr class="separator:gaa345ea3ab3694a94a60e6217cb8d5e59"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga02ea5e95c8939c2be78d26c255a6ba6f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga02ea5e95c8939c2be78d26c255a6ba6f">XQspiPsu_SetStatusHandler</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, void *CallBackRef, <a class="el" href="group__qspipsu__api.html#ga4fcad0707fd0557232bc94a8c3ba1fea">XQspiPsu_StatusHandler</a> FuncPointer)</td></tr>
<tr class="memdesc:ga02ea5e95c8939c2be78d26c255a6ba6f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the status callback function, the status handler, which the driver calls when it encounters conditions that should be reported to upper layer software.  <a href="#ga02ea5e95c8939c2be78d26c255a6ba6f">More...</a><br/></td></tr>
<tr class="separator:ga02ea5e95c8939c2be78d26c255a6ba6f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0ec97b3d7c6cb24544f0bfa8114b56d7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga0ec97b3d7c6cb24544f0bfa8114b56d7">XQspiPsu_WriteProtectToggle</a> (const <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, u32 Toggle)</td></tr>
<tr class="memdesc:ga0ec97b3d7c6cb24544f0bfa8114b56d7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enables/disables Write Protect pin on the flash parts.  <a href="#ga0ec97b3d7c6cb24544f0bfa8114b56d7">More...</a><br/></td></tr>
<tr class="separator:ga0ec97b3d7c6cb24544f0bfa8114b56d7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga769969b43f91def18f7501555ec35b11"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga769969b43f91def18f7501555ec35b11">XQspiPsu_StartDmaTransfer</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *Msg, u32 NumMsg)</td></tr>
<tr class="memdesc:ga769969b43f91def18f7501555ec35b11"><td class="mdescLeft">&#160;</td><td class="mdescRight">Starts a DMA transfer.  <a href="#ga769969b43f91def18f7501555ec35b11">More...</a><br/></td></tr>
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<tr class="memitem:ga6be41fd692a96516b0ce22591510c73d"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga6be41fd692a96516b0ce22591510c73d">XQspiPsu_CheckDmaDone</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga6be41fd692a96516b0ce22591510c73d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Checks for DMA transfer complete.  <a href="#ga6be41fd692a96516b0ce22591510c73d">More...</a><br/></td></tr>
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<tr class="memitem:gafd84d3f23643ccbcbd4637f786ba48fa"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_qspi_psu___config.html">XQspiPsu_Config</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gafd84d3f23643ccbcbd4637f786ba48fa">XQspiPsu_LookupConfig</a> (u16 DeviceId)</td></tr>
<tr class="memdesc:gafd84d3f23643ccbcbd4637f786ba48fa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Looks up the device configuration based on the unique device ID.  <a href="#gafd84d3f23643ccbcbd4637f786ba48fa">More...</a><br/></td></tr>
<tr class="separator:gafd84d3f23643ccbcbd4637f786ba48fa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9b86ec1c50d3af19b922698fa9ba7dfb"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga9b86ec1c50d3af19b922698fa9ba7dfb">XQspiPsu_SetClkPrescaler</a> (const <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, u8 Prescaler)</td></tr>
<tr class="memdesc:ga9b86ec1c50d3af19b922698fa9ba7dfb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures the clock according to the prescaler passed.  <a href="#ga9b86ec1c50d3af19b922698fa9ba7dfb">More...</a><br/></td></tr>
<tr class="separator:ga9b86ec1c50d3af19b922698fa9ba7dfb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga28338ae42ed4f7d2685ab18de2d21128"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga28338ae42ed4f7d2685ab18de2d21128">XQspiPsu_SelectFlash</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, u8 FlashCS, u8 FlashBus)</td></tr>
<tr class="memdesc:ga28338ae42ed4f7d2685ab18de2d21128"><td class="mdescLeft">&#160;</td><td class="mdescRight">Used to tell the QSPIPSU driver the hardware flash configuration being used.  <a href="#ga28338ae42ed4f7d2685ab18de2d21128">More...</a><br/></td></tr>
<tr class="separator:ga28338ae42ed4f7d2685ab18de2d21128"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad0fea713a1ec2a4ce6159439e30f7cd7"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gad0fea713a1ec2a4ce6159439e30f7cd7">XQspiPsu_SetOptions</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, u32 Options)</td></tr>
<tr class="memdesc:gad0fea713a1ec2a4ce6159439e30f7cd7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the options for the QSPIPSU device driver.The options control how the device behaves relative to the QSPIPSU bus.  <a href="#gad0fea713a1ec2a4ce6159439e30f7cd7">More...</a><br/></td></tr>
<tr class="separator:gad0fea713a1ec2a4ce6159439e30f7cd7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0948cd1e33a60561c808e681306bcc65"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga0948cd1e33a60561c808e681306bcc65">XQspiPsu_ClearOptions</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, u32 Options)</td></tr>
<tr class="memdesc:ga0948cd1e33a60561c808e681306bcc65"><td class="mdescLeft">&#160;</td><td class="mdescRight">Resets the options for the QSPIPSU device driver.  <a href="#ga0948cd1e33a60561c808e681306bcc65">More...</a><br/></td></tr>
<tr class="separator:ga0948cd1e33a60561c808e681306bcc65"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab0d4072d9dfe0949c8e099342c2270f6"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gab0d4072d9dfe0949c8e099342c2270f6">XQspiPsu_GetOptions</a> (const <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr)</td></tr>
<tr class="memdesc:gab0d4072d9dfe0949c8e099342c2270f6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Gets the options for the QSPIPSU device.  <a href="#gab0d4072d9dfe0949c8e099342c2270f6">More...</a><br/></td></tr>
<tr class="separator:gab0d4072d9dfe0949c8e099342c2270f6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3a37a08570be55ea07945a18a80306f3"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga3a37a08570be55ea07945a18a80306f3">XQspiPsu_SetReadMode</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, u32 Mode)</td></tr>
<tr class="memdesc:ga3a37a08570be55ea07945a18a80306f3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the Read mode for the QSPIPSU device driver.  <a href="#ga3a37a08570be55ea07945a18a80306f3">More...</a><br/></td></tr>
<tr class="separator:ga3a37a08570be55ea07945a18a80306f3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga54cce449d0bda6133fe2c254a164e08e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga54cce449d0bda6133fe2c254a164e08e">XQspiPsu_SetWP</a> (const <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, u8 Value)</td></tr>
<tr class="memdesc:ga54cce449d0bda6133fe2c254a164e08e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the Write Protect and Hold options for the QSPIPSU device driver.  <a href="#ga54cce449d0bda6133fe2c254a164e08e">More...</a><br/></td></tr>
<tr class="separator:ga54cce449d0bda6133fe2c254a164e08e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga08036c2fa8996e246d9d529fd2302af9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga08036c2fa8996e246d9d529fd2302af9">XQspiPsu_GenFifoEntryData</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *Msg)</td></tr>
<tr class="memdesc:ga08036c2fa8996e246d9d529fd2302af9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Writes the GENFIFO entries to transmit the messages requested.  <a href="#ga08036c2fa8996e246d9d529fd2302af9">More...</a><br/></td></tr>
<tr class="separator:ga08036c2fa8996e246d9d529fd2302af9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae55fa60e803534f990c0493b67eb02f1"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gae55fa60e803534f990c0493b67eb02f1">XQspiPsu_PollDataConfig</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *FlashMsg)</td></tr>
<tr class="memdesc:gae55fa60e803534f990c0493b67eb02f1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enables the polling functionality of controller.  <a href="#gae55fa60e803534f990c0493b67eb02f1">More...</a><br/></td></tr>
<tr class="separator:gae55fa60e803534f990c0493b67eb02f1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga83a88b04245b12857557e1d443cd3689"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga83a88b04245b12857557e1d443cd3689">XQspiPsu_PolledMessageTransfer</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *Msg, u32 NumMsg)</td></tr>
<tr class="memdesc:ga83a88b04245b12857557e1d443cd3689"><td class="mdescLeft">&#160;</td><td class="mdescRight">Performs a transfer on the bus in polled mode.  <a href="#ga83a88b04245b12857557e1d443cd3689">More...</a><br/></td></tr>
<tr class="separator:ga83a88b04245b12857557e1d443cd3689"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf5cca9a4c8ba075e4d9855a789cecc40"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gaf5cca9a4c8ba075e4d9855a789cecc40">XQspiPsu_IntrDataTransfer</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, u32 *QspiPsuStatusReg, u8 *DeltaMsgCnt)</td></tr>
<tr class="memdesc:gaf5cca9a4c8ba075e4d9855a789cecc40"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transfers Tx and Rx data.  <a href="#gaf5cca9a4c8ba075e4d9855a789cecc40">More...</a><br/></td></tr>
<tr class="separator:gaf5cca9a4c8ba075e4d9855a789cecc40"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga73c0f0aa6fe6f1818b7ec15cdac0e7ed"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga73c0f0aa6fe6f1818b7ec15cdac0e7ed">XQspiPsu_IntrDummyDataTransfer</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, u32 QspiPsuStatusReg, u8 DeltaMsgCnt)</td></tr>
<tr class="memdesc:ga73c0f0aa6fe6f1818b7ec15cdac0e7ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transfers Dummy byte.  <a href="#ga73c0f0aa6fe6f1818b7ec15cdac0e7ed">More...</a><br/></td></tr>
<tr class="separator:ga73c0f0aa6fe6f1818b7ec15cdac0e7ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf5c0853d67052b9b05af03946e51c4c2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gaf5c0853d67052b9b05af03946e51c4c2">XQspiPsu_FillTxFifo</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *Msg, u32 Size)</td></tr>
<tr class="memdesc:gaf5c0853d67052b9b05af03946e51c4c2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fills the TX FIFO as long as there is room in the FIFO or the bytes required to be transmitted.  <a href="#gaf5c0853d67052b9b05af03946e51c4c2">More...</a><br/></td></tr>
<tr class="separator:gaf5c0853d67052b9b05af03946e51c4c2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga58406ccb7e182a93cd3a47c060de091e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga58406ccb7e182a93cd3a47c060de091e">XQspiPsu_TXSetup</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *Msg)</td></tr>
<tr class="memdesc:ga58406ccb7e182a93cd3a47c060de091e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Checks the TX buffer in the message and setup the TX FIFO as required.  <a href="#ga58406ccb7e182a93cd3a47c060de091e">More...</a><br/></td></tr>
<tr class="separator:ga58406ccb7e182a93cd3a47c060de091e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0467a9580fe9018adfd4302fbd91e404"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga0467a9580fe9018adfd4302fbd91e404">XQspiPsu_SetupRxDma</a> (const <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *Msg)</td></tr>
<tr class="memdesc:ga0467a9580fe9018adfd4302fbd91e404"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets up the RX DMA operation.  <a href="#ga0467a9580fe9018adfd4302fbd91e404">More...</a><br/></td></tr>
<tr class="separator:ga0467a9580fe9018adfd4302fbd91e404"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga03fb04c8187cf51d256a9196430c6224"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga03fb04c8187cf51d256a9196430c6224">XQspiPsu_Setup64BRxDma</a> (const <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *Msg)</td></tr>
<tr class="memdesc:ga03fb04c8187cf51d256a9196430c6224"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets up the RX DMA operation on a 32-bit Machine For 64-bit DMA transfers.  <a href="#ga03fb04c8187cf51d256a9196430c6224">More...</a><br/></td></tr>
<tr class="separator:ga03fb04c8187cf51d256a9196430c6224"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga02f2ea05785dff6887625c5ef088a73b"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga02f2ea05785dff6887625c5ef088a73b">XQspiPsu_SetIOMode</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *Msg)</td></tr>
<tr class="memdesc:ga02f2ea05785dff6887625c5ef088a73b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reads remaining bytes after the completion of a DMA transfer using I/O mode.  <a href="#ga02f2ea05785dff6887625c5ef088a73b">More...</a><br/></td></tr>
<tr class="separator:ga02f2ea05785dff6887625c5ef088a73b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad77b041e10c03756bd0e3c197a63a2e3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gad77b041e10c03756bd0e3c197a63a2e3">XQspiPsu_RXSetup</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *Msg)</td></tr>
<tr class="memdesc:gad77b041e10c03756bd0e3c197a63a2e3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Checks the RX buffers in the message and setup the RX DMA as required.  <a href="#gad77b041e10c03756bd0e3c197a63a2e3">More...</a><br/></td></tr>
<tr class="separator:gad77b041e10c03756bd0e3c197a63a2e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8b201a022bb63afbaaf9afad23064761"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga8b201a022bb63afbaaf9afad23064761">XQspiPsu_TXRXSetup</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *Msg, u32 *GenFifoEntry)</td></tr>
<tr class="memdesc:ga8b201a022bb63afbaaf9afad23064761"><td class="mdescLeft">&#160;</td><td class="mdescRight">Checks the TX/RX buffers in the message and setups up the GENFIFO entries, TX FIFO, or RX DMA as required.  <a href="#ga8b201a022bb63afbaaf9afad23064761">More...</a><br/></td></tr>
<tr class="separator:ga8b201a022bb63afbaaf9afad23064761"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7fc4cdebc35bb7b5d3ca9128917c131c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga7fc4cdebc35bb7b5d3ca9128917c131c">XQspiPsu_GenFifoEntryDataLen</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *Msg, u32 *GenFifoEntry)</td></tr>
<tr class="memdesc:ga7fc4cdebc35bb7b5d3ca9128917c131c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Writes the data length to GENFIFO entries to be transmitted or received.  <a href="#ga7fc4cdebc35bb7b5d3ca9128917c131c">More...</a><br/></td></tr>
<tr class="separator:ga7fc4cdebc35bb7b5d3ca9128917c131c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6f3b7fc81ae5c50ee3ea373d80b4b542"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga6f3b7fc81ae5c50ee3ea373d80b4b542">XQspiPsu_CreatePollDataConfig</a> (const <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, const <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *FlashMsg)</td></tr>
<tr class="memdesc:ga6f3b7fc81ae5c50ee3ea373d80b4b542"><td class="mdescLeft">&#160;</td><td class="mdescRight">Creates Poll configuration register data to write.  <a href="#ga6f3b7fc81ae5c50ee3ea373d80b4b542">More...</a><br/></td></tr>
<tr class="separator:ga6f3b7fc81ae5c50ee3ea373d80b4b542"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae7bfe0aff5a064a01b0f822f46b26deb"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gae7bfe0aff5a064a01b0f822f46b26deb">XQspiPsu_SelectSpiMode</a> (u8 SpiMode)</td></tr>
<tr class="memdesc:gae7bfe0aff5a064a01b0f822f46b26deb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Selects SPI mode - x1 or x2 or x4.  <a href="#gae7bfe0aff5a064a01b0f822f46b26deb">More...</a><br/></td></tr>
<tr class="separator:gae7bfe0aff5a064a01b0f822f46b26deb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae720bdee9a521b160e1e364053b66b61"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gae720bdee9a521b160e1e364053b66b61">XQspiPsu_SetDefaultConfig</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr)</td></tr>
<tr class="memdesc:gae720bdee9a521b160e1e364053b66b61"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enables and initializes DMA Mode, set little endain, disable poll timeout, clears prescalar bits and reset thresholds.  <a href="#gae720bdee9a521b160e1e364053b66b61">More...</a><br/></td></tr>
<tr class="separator:gae720bdee9a521b160e1e364053b66b61"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa04d433c594d66417be2c4f83c092203"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gaa04d433c594d66417be2c4f83c092203">XQspiPsu_ReadRxFifo</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *Msg, s32 Size)</td></tr>
<tr class="memdesc:gaa04d433c594d66417be2c4f83c092203"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reads the specified number of bytes from RX FIFO.  <a href="#gaa04d433c594d66417be2c4f83c092203">More...</a><br/></td></tr>
<tr class="separator:gaa04d433c594d66417be2c4f83c092203"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae7900ea73e245de8f091d4d4c201fe76"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gae7900ea73e245de8f091d4d4c201fe76">XQspiPsu_IORead</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *Msg, u32 StatusReg)</td></tr>
<tr class="memdesc:gae7900ea73e245de8f091d4d4c201fe76"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reads data from RXFifo in I/O mode.  <a href="#gae7900ea73e245de8f091d4d4c201fe76">More...</a><br/></td></tr>
<tr class="separator:gae7900ea73e245de8f091d4d4c201fe76"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad8adcb1fd07106bb0add26e24a4c0084"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gad8adcb1fd07106bb0add26e24a4c0084">XQspiPsu_PolledSendData</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *Msg, s32 Index)</td></tr>
<tr class="memdesc:gad8adcb1fd07106bb0add26e24a4c0084"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transfers Tx data on the bus in polled mode.  <a href="#gad8adcb1fd07106bb0add26e24a4c0084">More...</a><br/></td></tr>
<tr class="separator:gad8adcb1fd07106bb0add26e24a4c0084"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga18829cabd2b37c4cf9fb2efa0632c398"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga18829cabd2b37c4cf9fb2efa0632c398">XQspiPsu_PolledRecvData</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *Msg, s32 Index, u32 *IOPending)</td></tr>
<tr class="memdesc:ga18829cabd2b37c4cf9fb2efa0632c398"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transfers Rx data on the bus in polled mode.  <a href="#ga18829cabd2b37c4cf9fb2efa0632c398">More...</a><br/></td></tr>
<tr class="separator:ga18829cabd2b37c4cf9fb2efa0632c398"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa77c471d9c50c3671a2f2a7c28707f4d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gaa77c471d9c50c3671a2f2a7c28707f4d">XQspiPsu_IntrSendData</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, u32 QspiPsuStatusReg, u8 *DeltaMsgCnt)</td></tr>
<tr class="memdesc:gaa77c471d9c50c3671a2f2a7c28707f4d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Performs a transfer of Tx data on the bus in interrupt mode.  <a href="#gaa77c471d9c50c3671a2f2a7c28707f4d">More...</a><br/></td></tr>
<tr class="separator:gaa77c471d9c50c3671a2f2a7c28707f4d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga872f5fe8dbac27ca8867387e2185069d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga872f5fe8dbac27ca8867387e2185069d">XQspiPsu_IntrRecvData</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, u32 QspiPsuStatusReg, u32 DmaIntrStatusReg, u8 *DeltaMsgCnt)</td></tr>
<tr class="memdesc:ga872f5fe8dbac27ca8867387e2185069d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Performs a transfer of Rx data on the busin interrupt mode.  <a href="#ga872f5fe8dbac27ca8867387e2185069d">More...</a><br/></td></tr>
<tr class="separator:ga872f5fe8dbac27ca8867387e2185069d"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="var-members"></a>
Variables</h2></td></tr>
<tr class="memitem:ga0a1440bbf114a2e065b65bca531a14c3"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_qspi_psu___config.html">XQspiPsu_Config</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga0a1440bbf114a2e065b65bca531a14c3">XQspiPsu_ConfigTable</a> [XPAR_XQSPIPSU_NUM_INSTANCES]</td></tr>
<tr class="memdesc:ga0a1440bbf114a2e065b65bca531a14c3"><td class="mdescLeft">&#160;</td><td class="mdescRight">This table contains configuration information for each QSPIPSU device in the system.  <a href="#ga0a1440bbf114a2e065b65bca531a14c3">More...</a><br/></td></tr>
<tr class="separator:ga0a1440bbf114a2e065b65bca531a14c3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0a1440bbf114a2e065b65bca531a14c3"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_qspi_psu___config.html">XQspiPsu_Config</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga0a1440bbf114a2e065b65bca531a14c3">XQspiPsu_ConfigTable</a> [XPAR_XQSPIPSU_NUM_INSTANCES]</td></tr>
<tr class="memdesc:ga0a1440bbf114a2e065b65bca531a14c3"><td class="mdescLeft">&#160;</td><td class="mdescRight">This table contains configuration information for each QSPIPSU device in the system.  <a href="#ga0a1440bbf114a2e065b65bca531a14c3">More...</a><br/></td></tr>
<tr class="separator:ga0a1440bbf114a2e065b65bca531a14c3"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<h2 class="groupheader">Macro Definition Documentation</h2>
<a class="anchor" id="gabda6452f72fa7ac726793c30f048437b"></a>
<div class="memitem">
<div class="memproto">
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          <td class="memname">#define BYTES1024_PER_PAGE&#160;&#160;&#160;1024U</td>
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      </table>
</div><div class="memdoc">

<p>1024 Bytes per Page </p>

</div>
</div>
<a class="anchor" id="gae555f89da9885e478f966606d733f6cb"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
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          <td class="memname">#define BYTES256_PER_PAGE&#160;&#160;&#160;256U</td>
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      </table>
</div><div class="memdoc">

<p>Definitions for Intel, STM, Winbond and Spansion Serial Flash Device geometry. </p>
<p>256 Bytes per Page </p>

</div>
</div>
<a class="anchor" id="gafa22091b59ed6f3d87feb9ea5e704c08"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define BYTES512_PER_PAGE&#160;&#160;&#160;512U</td>
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      </table>
</div><div class="memdoc">

<p>512 Bytes per Page </p>

</div>
</div>
<a class="anchor" id="ga02055aef4b0f9a801005ebdc7b556157"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define MAX_DELAY_CNT&#160;&#160;&#160;1000000000U</td>
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      </table>
</div><div class="memdoc">

<p>Max delay count. </p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#ga18829cabd2b37c4cf9fb2efa0632c398">XQspiPsu_PolledRecvData()</a>, and <a class="el" href="group__qspipsu__api.html#gad8adcb1fd07106bb0add26e24a4c0084">XQspiPsu_PolledSendData()</a>.</p>

</div>
</div>
<a class="anchor" id="ga02055aef4b0f9a801005ebdc7b556157"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define MAX_DELAY_CNT&#160;&#160;&#160;1000000000U</td>
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      </table>
</div><div class="memdoc">

<p>Max delay count. </p>

<p>Referenced by <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a4f09bf044ed26b11fc5489cb7b7ca1e6">BulkErase()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a97d8ab88e6002a97c30b95b66db231ea">DieErase()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a83a78784f5ba39b5e76b17a7e4a5ecad">FlashEnableQuadMode()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#ae8d1767607b58391ccb2d0103c2fd456">FlashEnterExit4BAddMode()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a8c7c38172a5258ee7cdfaef5a1a9af82">FlashErase()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#aaaad34739d0ad6d1fb5436c1d6428463">FlashRead()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#ac7c0194bd58d158581c699b8c07c309d">FlashReadID()</a>, <a class="el" href="xqspipsu__generic__flash__non__blocking__read__example_8c.html#a5b70ac0045f51c4babd8709e1c030752">FlashRegisterWrite()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a333c8e44e9af52811dee98f2cfcacf53">FlashWrite()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#aa6007218826af36e0df62b747de40de5">MultiDieRead()</a>, <a class="el" href="group__qspipsu__api.html#gaaa69ec6da90deb760954ea3dcfd55d7f">XQspiPsu_Abort()</a>, <a class="el" href="group__qspipsu__api.html#ga6be41fd692a96516b0ce22591510c73d">XQspiPsu_CheckDmaDone()</a>, <a class="el" href="group__qspipsu__api.html#ga61de390e2bc4af0ce77448a46763ea39">XQspiPsu_PolledTransfer()</a>, and <a class="el" href="group__qspipsu__api.html#ga769969b43f91def18f7501555ec35b11">XQspiPsu_StartDmaTransfer()</a>.</p>

</div>
</div>
<a class="anchor" id="ga4fd9659b4df1e9ffc7840aea4bf9c860"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define NUM_OF_SECTORS1024&#160;&#160;&#160;1024U</td>
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</div><div class="memdoc">

<p>1024 Sectors </p>

</div>
</div>
<a class="anchor" id="gaf596e2100925c36df243bcdb30d3bead"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define NUM_OF_SECTORS128&#160;&#160;&#160;128U</td>
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      </table>
</div><div class="memdoc">

<p>128 Sectors </p>

</div>
</div>
<a class="anchor" id="ga1d5e17491d5265f0225ab0f5c2a06c5d"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define NUM_OF_SECTORS16&#160;&#160;&#160;16U</td>
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      </table>
</div><div class="memdoc">

<p>16 Sectors </p>

</div>
</div>
<a class="anchor" id="ga2f05bc67f1108755e4a4d90b6dc3952a"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define NUM_OF_SECTORS2&#160;&#160;&#160;2U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>2 Sectors </p>

</div>
</div>
<a class="anchor" id="ga7627c908fc89c896508f59ab962a9f90"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define NUM_OF_SECTORS2048&#160;&#160;&#160;2048U</td>
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      </table>
</div><div class="memdoc">

<p>2048 Sectors </p>

</div>
</div>
<a class="anchor" id="ga65aff8cefc65fd54c112220a6dba7d72"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define NUM_OF_SECTORS256&#160;&#160;&#160;256U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>256 Sectors </p>

</div>
</div>
<a class="anchor" id="gac539ae030c42b7175119ba5eebac3d1e"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define NUM_OF_SECTORS32&#160;&#160;&#160;32U</td>
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</div><div class="memdoc">

<p>32 Sectors </p>

</div>
</div>
<a class="anchor" id="gac03b6f3c82e81b724869805933e0fecf"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define NUM_OF_SECTORS4&#160;&#160;&#160;4U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>4 Sectors </p>

</div>
</div>
<a class="anchor" id="gadf357dd80cd00a94db0d59b0b26e0994"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define NUM_OF_SECTORS4096&#160;&#160;&#160;4096U</td>
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      </table>
</div><div class="memdoc">

<p>4096 Sectors </p>

</div>
</div>
<a class="anchor" id="ga157510b7e2dc33102c6d445849ea0539"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define NUM_OF_SECTORS512&#160;&#160;&#160;512U</td>
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      </table>
</div><div class="memdoc">

<p>512 Sectors </p>

</div>
</div>
<a class="anchor" id="ga68349ca2530e582759ebed4d3c059715"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define NUM_OF_SECTORS64&#160;&#160;&#160;64U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>64 Sectors </p>

</div>
</div>
<a class="anchor" id="gae76ed1fab4655b7f431ccbbd3507c24b"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define NUM_OF_SECTORS8&#160;&#160;&#160;8U</td>
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</div><div class="memdoc">

<p>8 Sector </p>

</div>
</div>
<a class="anchor" id="gaf0c1bb203cfb920a65ed1bf7658a592c"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define NUM_OF_SECTORS8192&#160;&#160;&#160;8192U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>8192 Sectors </p>

</div>
</div>
<a class="anchor" id="ga316a6040b744597acbda4eec7fb11dc4"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define PAGES1024_PER_SECTOR&#160;&#160;&#160;1024U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>1024 Pages per Sector </p>

</div>
</div>
<a class="anchor" id="ga4ba0770080887dc7e8532410991d1cd0"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define PAGES128_PER_SECTOR&#160;&#160;&#160;128U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>128 Pages per Sector </p>

</div>
</div>
<a class="anchor" id="ga8f6cb585fdfcd437be3327cde9dcbaa3"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define PAGES16_PER_SECTOR&#160;&#160;&#160;16U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>16 Pages per Sector </p>

</div>
</div>
<a class="anchor" id="gae22160855f0944bf6ac104c86b0205ea"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define PAGES256_PER_SECTOR&#160;&#160;&#160;256U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>256 Pages per Sector </p>

</div>
</div>
<a class="anchor" id="ga245b295583508488ac50031b6a872d8b"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define PAGES512_PER_SECTOR&#160;&#160;&#160;512U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>512 Pages per Sector </p>

</div>
</div>
<a class="anchor" id="ga645c1791a368efc87d7856165b1cf20a"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define SECTOR_SIZE_128K&#160;&#160;&#160;0X20000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>128K Sector </p>

</div>
</div>
<a class="anchor" id="ga24583aac10a7dc8d022da0fe1b1812ca"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define SECTOR_SIZE_256K&#160;&#160;&#160;0X40000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>256K Sector </p>

</div>
</div>
<a class="anchor" id="gaf55253fc7f2d508133e14d927c3b5621"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define SECTOR_SIZE_512K&#160;&#160;&#160;0X80000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>512K Sector </p>

</div>
</div>
<a class="anchor" id="gaf7b4349b24320ffc1c4bf957149635ad"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define SECTOR_SIZE_64K&#160;&#160;&#160;0X10000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>64K Sector </p>

</div>
</div>
<a class="anchor" id="ga5f92c1428dba9ddfbe53c5322ab85f60"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XQSPIPSU_CLK_ACTIVE_LOW_OPTION&#160;&#160;&#160;0x2U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Clk Active low option. </p>

</div>
</div>
<a class="anchor" id="gaaf184726885a8746f3491828cf567789"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XQSPIPSU_CLK_PHASE_1_OPTION&#160;&#160;&#160;0x4U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Clk phase 1 option. </p>

</div>
</div>
<a class="anchor" id="gaa2b9483e70d14d8c089d5ea8137493bb"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XQSPIPSU_CLK_PRESCALE_128&#160;&#160;&#160;0x06U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Clock prescale 128. </p>

</div>
</div>
<a class="anchor" id="gaeb4ea545b7f20a35517850210c69f8eb"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XQSPIPSU_CLK_PRESCALE_16&#160;&#160;&#160;0x03U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Clock prescale 16. </p>

</div>
</div>
<a class="anchor" id="ga282e0a0766d2bb5d1394f988822f705b"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XQSPIPSU_CLK_PRESCALE_2&#160;&#160;&#160;0x00U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Clock prescale 2. </p>

</div>
</div>
<a class="anchor" id="gad11dc937000484649724060d0bcdf00c"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XQSPIPSU_CLK_PRESCALE_256&#160;&#160;&#160;0x07U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Clock prescale 256. </p>

</div>
</div>
<a class="anchor" id="ga1bb7e07e34628bde17347f45665d658d"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XQSPIPSU_CLK_PRESCALE_32&#160;&#160;&#160;0x04U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Clock prescale 32. </p>

</div>
</div>
<a class="anchor" id="gaf20988bd132defabd58b714360e2d900"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XQSPIPSU_CLK_PRESCALE_4&#160;&#160;&#160;0x01U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Clock prescale 4. </p>

</div>
</div>
<a class="anchor" id="ga617bfea4aaac9e96cf64dc511b5e1571"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XQSPIPSU_CLK_PRESCALE_64&#160;&#160;&#160;0x05U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Clock prescale 64. </p>

</div>
</div>
<a class="anchor" id="ga37ca68c0fddda883028f393eb5626437"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XQSPIPSU_CLK_PRESCALE_8&#160;&#160;&#160;0x02U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Clock prescale 8. </p>

<p>Referenced by <a class="el" href="xqspipsu__generic__flash__non__blocking__read__example_8c.html#a653eb600a5672ee9c7664f2720a05258">QspiPsuFlashNonBlockingReadExample()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a1d5699f770ac9e1ceaf76398b568b9ee">QspiPsuInterruptFlashExample()</a>, <a class="el" href="xqspipsu__generic__flash__polled__64bit__dma__r5__example_8c.html#ac7a0e7a44578f580f46491eb6f6ce726">QspiPsuPolledFlashExample()</a>, and <a class="el" href="xqspipsu__write__protect__example_8c.html#a191ca904211eda1c8b5dddc5e6a16331">QspiPsuWriteProtectFlashExample()</a>.</p>

</div>
</div>
<a class="anchor" id="ga493629a6f3d8fb0312dbcaf3e9cbe0e8"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XQSPIPSU_CONNECTION_MODE_PARALLEL&#160;&#160;&#160;2U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Parallel mode connection. </p>

<p>Referenced by <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a4f09bf044ed26b11fc5489cb7b7ca1e6">BulkErase()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a97d8ab88e6002a97c30b95b66db231ea">DieErase()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a83a78784f5ba39b5e76b17a7e4a5ecad">FlashEnableQuadMode()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#ae8d1767607b58391ccb2d0103c2fd456">FlashEnterExit4BAddMode()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a8c7c38172a5258ee7cdfaef5a1a9af82">FlashErase()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#aaaad34739d0ad6d1fb5436c1d6428463">FlashRead()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a333c8e44e9af52811dee98f2cfcacf53">FlashWrite()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#af45c38b76bbabbaf848a33cdc889ebfb">GetRealAddr()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#aa6007218826af36e0df62b747de40de5">MultiDieRead()</a>, <a class="el" href="xqspipsu__polldata__polltimeout__interrupt__example_8c.html#a90454c300a46c3a9c1ba66d2a680b63c">QspiPsuConfigurePoll()</a>, <a class="el" href="xqspipsu__generic__flash__non__blocking__read__example_8c.html#a653eb600a5672ee9c7664f2720a05258">QspiPsuFlashNonBlockingReadExample()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a1d5699f770ac9e1ceaf76398b568b9ee">QspiPsuInterruptFlashExample()</a>, <a class="el" href="xqspipsu__generic__flash__polled__64bit__dma__r5__example_8c.html#ac7a0e7a44578f580f46491eb6f6ce726">QspiPsuPolledFlashExample()</a>, and <a class="el" href="xqspipsu__write__protect__example_8c.html#a191ca904211eda1c8b5dddc5e6a16331">QspiPsuWriteProtectFlashExample()</a>.</p>

</div>
</div>
<a class="anchor" id="ga19d7a74e6402f4ba3cd33fe08602447d"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XQSPIPSU_CONNECTION_MODE_SINGLE&#160;&#160;&#160;0U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Single mode connection. </p>

<p>Referenced by <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#af45c38b76bbabbaf848a33cdc889ebfb">GetRealAddr()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#aa6007218826af36e0df62b747de40de5">MultiDieRead()</a>, and <a class="el" href="group__qspipsu__api.html#ga0ec97b3d7c6cb24544f0bfa8114b56d7">XQspiPsu_WriteProtectToggle()</a>.</p>

</div>
</div>
<a class="anchor" id="gacddf674343015377edb4198800b6549b"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XQSPIPSU_CONNECTION_MODE_STACKED&#160;&#160;&#160;1U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Stacked mode connection. </p>

<p>Referenced by <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a97d8ab88e6002a97c30b95b66db231ea">DieErase()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a8c7c38172a5258ee7cdfaef5a1a9af82">FlashErase()</a>, and <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#af45c38b76bbabbaf848a33cdc889ebfb">GetRealAddr()</a>.</p>

</div>
</div>
<a class="anchor" id="gae53e5d9f18e5fe950d0ce0165880bb7f"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XQSPIPSU_CR_PRESC_MAXIMUM&#160;&#160;&#160;7U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Prescale max. </p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#ga9b86ec1c50d3af19b922698fa9ba7dfb">XQspiPsu_SetClkPrescaler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga06dd7ccdefd898567875836018f87dcb"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XQspiPsu_Disable</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr</td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line"><a class="code" href="group__qspipsu.html#gaf9672b4f2ec43ccf15204998ff3df728">XQspiPsu_Out32</a>(((InstancePtr)-&gt;Config.BaseAddress) + \</div>
<div class="line">                       <a class="code" href="group__qspipsu.html#ga5b7b95790bfeb5bfb3dfd63e4a5e76cc">XQSPIPSU_EN_OFFSET</a>, 0x0U)</div>
<div class="ttc" id="group__qspipsu_html_ga5b7b95790bfeb5bfb3dfd63e4a5e76cc"><div class="ttname"><a href="group__qspipsu.html#ga5b7b95790bfeb5bfb3dfd63e4a5e76cc">XQSPIPSU_EN_OFFSET</a></div><div class="ttdeci">#define XQSPIPSU_EN_OFFSET</div><div class="ttdoc">Register: XQSPIPSU_EN_REG. </div><div class="ttdef"><b>Definition:</b> xqspipsu_hw.h:380</div></div>
<div class="ttc" id="group__qspipsu_html_gaf9672b4f2ec43ccf15204998ff3df728"><div class="ttname"><a href="group__qspipsu.html#gaf9672b4f2ec43ccf15204998ff3df728">XQspiPsu_Out32</a></div><div class="ttdeci">#define XQspiPsu_Out32</div><div class="ttdoc">Write the 32 bit register value. </div><div class="ttdef"><b>Definition:</b> xqspipsu_hw.h:965</div></div>
</div><!-- fragment -->
<p>Disable QSPI controller. </p>

</div>
</div>
<a class="anchor" id="gafa633d08d4bcacadc20f2696665edb75"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XQSPIPSU_DMA_BYTES_MAX&#160;&#160;&#160;0x10000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>DMA bytes max. </p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#ga6ae727534cf55b878b9b1974dc72a625">XQspiPsu_InterruptTransfer()</a>, <a class="el" href="group__qspipsu__api.html#ga61de390e2bc4af0ce77448a46763ea39">XQspiPsu_PolledTransfer()</a>, and <a class="el" href="group__qspipsu__api.html#ga769969b43f91def18f7501555ec35b11">XQspiPsu_StartDmaTransfer()</a>.</p>

</div>
</div>
<a class="anchor" id="gaa44815f385a69052a3f637f57428f506"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XQspiPsu_Enable</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr</td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line"><a class="code" href="group__qspipsu.html#gaf9672b4f2ec43ccf15204998ff3df728">XQspiPsu_Out32</a>(((InstancePtr)-&gt;Config.BaseAddress) + \</div>
<div class="line">                       <a class="code" href="group__qspipsu.html#ga5b7b95790bfeb5bfb3dfd63e4a5e76cc">XQSPIPSU_EN_OFFSET</a>, XQSPIPSU_EN_MASK)</div>
<div class="ttc" id="group__qspipsu_html_ga5b7b95790bfeb5bfb3dfd63e4a5e76cc"><div class="ttname"><a href="group__qspipsu.html#ga5b7b95790bfeb5bfb3dfd63e4a5e76cc">XQSPIPSU_EN_OFFSET</a></div><div class="ttdeci">#define XQSPIPSU_EN_OFFSET</div><div class="ttdoc">Register: XQSPIPSU_EN_REG. </div><div class="ttdef"><b>Definition:</b> xqspipsu_hw.h:380</div></div>
<div class="ttc" id="group__qspipsu_html_gaf9672b4f2ec43ccf15204998ff3df728"><div class="ttname"><a href="group__qspipsu.html#gaf9672b4f2ec43ccf15204998ff3df728">XQspiPsu_Out32</a></div><div class="ttdeci">#define XQspiPsu_Out32</div><div class="ttdoc">Write the 32 bit register value. </div><div class="ttdef"><b>Definition:</b> xqspipsu_hw.h:965</div></div>
</div><!-- fragment -->
<p>Enable QSPI Controller. </p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#ga803eccd67d1dfde416b54488865c1e9d">XQspiPsu_CfgInitialize()</a>.</p>

</div>
</div>
<a class="anchor" id="gad7d635f9e12162067b8dbd3bd437e000"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XQSPIPSU_FREQ_100MHZ&#160;&#160;&#160;100000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Frequency 100 Mhz. </p>

</div>
</div>
<a class="anchor" id="gad8a6ec59576728197764eeab0b5a5eef"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XQSPIPSU_FREQ_150MHZ&#160;&#160;&#160;150000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Frequency 150 Mhz. </p>

</div>
</div>
<a class="anchor" id="gacb92bc4c932f3cb76254d29c165422ad"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XQSPIPSU_FREQ_37_5MHZ&#160;&#160;&#160;37500000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Frequency 375 Mhz. </p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#ga9b86ec1c50d3af19b922698fa9ba7dfb">XQspiPsu_SetClkPrescaler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga648e23a989497067a390c6805c38b986"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XQSPIPSU_FREQ_40MHZ&#160;&#160;&#160;40000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Frequency 40 Mhz. </p>

</div>
</div>
<a class="anchor" id="ga74b7854d095af4f443a976b426cfde7e"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XQSPIPSU_GENFIFO_CS_HOLD&#160;&#160;&#160;0x04U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Chip select hold in GENFIFO. </p>

</div>
</div>
<a class="anchor" id="gaa18ef26888b9b8f28135654a310b5924"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XQSPIPSU_GENFIFO_CS_SETUP&#160;&#160;&#160;0x05U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Chip select setup in GENFIO. </p>

</div>
</div>
<a class="anchor" id="ga9910c1e3f79127836cade9970a9df537"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XQSPIPSU_GENFIFO_EXP_START&#160;&#160;&#160;0x100U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Genfifo start. </p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#ga7fc4cdebc35bb7b5d3ca9128917c131c">XQspiPsu_GenFifoEntryDataLen()</a>.</p>

</div>
</div>
<a class="anchor" id="ga6079956c578f636665b87ca5f60b8bad"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XQspiPsu_GetLqspiConfigReg</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr</td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line"><a class="code" href="group__qspipsu.html#gac15438de9bb521c5731be71e6bc31ebb">XQspiPsu_In32</a>((<a class="code" href="group__qspipsu.html#ga49734e127e6359b15c1ce7f117748c36">XQSPIPS_BASEADDR</a>) + \</div>
<div class="line">                      <a class="code" href="group__qspipsu.html#ga02a2df38913ec3616e70351637cbbb50">XQSPIPSU_LQSPI_CR_OFFSET</a>)</div>
<div class="ttc" id="group__qspipsu_html_ga02a2df38913ec3616e70351637cbbb50"><div class="ttname"><a href="group__qspipsu.html#ga02a2df38913ec3616e70351637cbbb50">XQSPIPSU_LQSPI_CR_OFFSET</a></div><div class="ttdeci">#define XQSPIPSU_LQSPI_CR_OFFSET</div><div class="ttdoc">Register: XQSPIPSU_LQSPI. </div><div class="ttdef"><b>Definition:</b> xqspipsu_hw.h:146</div></div>
<div class="ttc" id="group__qspipsu_html_gac15438de9bb521c5731be71e6bc31ebb"><div class="ttname"><a href="group__qspipsu.html#gac15438de9bb521c5731be71e6bc31ebb">XQspiPsu_In32</a></div><div class="ttdeci">#define XQspiPsu_In32</div><div class="ttdoc">Read the 32 bit register value. </div><div class="ttdef"><b>Definition:</b> xqspipsu_hw.h:964</div></div>
<div class="ttc" id="group__qspipsu_html_ga49734e127e6359b15c1ce7f117748c36"><div class="ttname"><a href="group__qspipsu.html#ga49734e127e6359b15c1ce7f117748c36">XQSPIPS_BASEADDR</a></div><div class="ttdeci">#define XQSPIPS_BASEADDR</div><div class="ttdoc">QSPI Base Address. </div><div class="ttdef"><b>Definition:</b> xqspipsu_hw.h:64</div></div>
</div><!-- fragment -->
<p>Read Configuration register of LQSPI Controller. </p>

<p>Referenced by <a class="el" href="xqspipsu__generic__flash__lqspi__example_8c.html#aa6bbd1c49467adb12326f1d14b849a97">XQspiPsu_LqspiRead()</a>.</p>

</div>
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<a class="anchor" id="gaeeb412cbb77c5150bad39b346706a13c"></a>
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        <tr>
          <td class="memname">#define XQSPIPSU_H_</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>&lt; prevent circular inclusions </p>
<p>by using protection macros </p>

</div>
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<a class="anchor" id="ga9e5fb7239c5d7fbadc688e29c3fb087d"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define XQSPIPSU_LQSPI_LESS_THEN_SIXTEENMB&#160;&#160;&#160;1U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>LQSPI less Than 16 MB. </p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#gad0fea713a1ec2a4ce6159439e30f7cd7">XQspiPsu_SetOptions()</a>.</p>

</div>
</div>
<a class="anchor" id="gaf4dde3aacf0091e9d1748b1b915648a0"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XQSPIPSU_LQSPI_MODE_OPTION&#160;&#160;&#160;0x20U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>LQSPI mode option. </p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#gad0fea713a1ec2a4ce6159439e30f7cd7">XQspiPsu_SetOptions()</a>.</p>

</div>
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<a class="anchor" id="ga47c246bab4c5d4f6c8ff84e44049adc9"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XQSPIPSU_MANUAL_START_OPTION&#160;&#160;&#160;0x8U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Manual start option. </p>

<p>Referenced by <a class="el" href="xqspipsu__generic__flash__non__blocking__read__example_8c.html#a653eb600a5672ee9c7664f2720a05258">QspiPsuFlashNonBlockingReadExample()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a1d5699f770ac9e1ceaf76398b568b9ee">QspiPsuInterruptFlashExample()</a>, <a class="el" href="xqspipsu__generic__flash__polled__64bit__dma__r5__example_8c.html#ac7a0e7a44578f580f46491eb6f6ce726">QspiPsuPolledFlashExample()</a>, <a class="el" href="xqspipsu__write__protect__example_8c.html#a191ca904211eda1c8b5dddc5e6a16331">QspiPsuWriteProtectFlashExample()</a>, <a class="el" href="group__qspipsu__api.html#ga0948cd1e33a60561c808e681306bcc65">XQspiPsu_ClearOptions()</a>, and <a class="el" href="group__qspipsu__api.html#gad0fea713a1ec2a4ce6159439e30f7cd7">XQspiPsu_SetOptions()</a>.</p>

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<a class="anchor" id="gad4bd22b7d06c85885fafdae994e1c86a"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define XQSPIPSU_MSG_FLAG_POLL&#160;&#160;&#160;0x8U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>POLL Msg flag. </p>

<p>Referenced by <a class="el" href="xqspipsu__polldata__polltimeout__interrupt__example_8c.html#a90454c300a46c3a9c1ba66d2a680b63c">QspiPsuConfigurePoll()</a>, <a class="el" href="group__qspipsu__api.html#gaa345ea3ab3694a94a60e6217cb8d5e59">XQspiPsu_InterruptHandler()</a>, and <a class="el" href="group__qspipsu__api.html#ga6ae727534cf55b878b9b1974dc72a625">XQspiPsu_InterruptTransfer()</a>.</p>

</div>
</div>
<a class="anchor" id="gacdde904168f5899e4ba6ccd59c360849"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XQSPIPSU_MSG_FLAG_RX&#160;&#160;&#160;0x2U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Rx Msg flag. </p>

<p>Referenced by <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a4f09bf044ed26b11fc5489cb7b7ca1e6">BulkErase()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a97d8ab88e6002a97c30b95b66db231ea">DieErase()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a83a78784f5ba39b5e76b17a7e4a5ecad">FlashEnableQuadMode()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#ae8d1767607b58391ccb2d0103c2fd456">FlashEnterExit4BAddMode()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a8c7c38172a5258ee7cdfaef5a1a9af82">FlashErase()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#aaaad34739d0ad6d1fb5436c1d6428463">FlashRead()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#ac7c0194bd58d158581c699b8c07c309d">FlashReadID()</a>, <a class="el" href="xqspipsu__generic__flash__non__blocking__read__example_8c.html#a5e40a81a572bfacbf4d7a39af7905cea">FlashRegisterRead()</a>, <a class="el" href="xqspipsu__generic__flash__non__blocking__read__example_8c.html#a5b70ac0045f51c4babd8709e1c030752">FlashRegisterWrite()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a333c8e44e9af52811dee98f2cfcacf53">FlashWrite()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#aa6007218826af36e0df62b747de40de5">MultiDieRead()</a>, <a class="el" href="group__qspipsu__api.html#ga08036c2fa8996e246d9d529fd2302af9">XQspiPsu_GenFifoEntryData()</a>, <a class="el" href="group__qspipsu__api.html#gaa345ea3ab3694a94a60e6217cb8d5e59">XQspiPsu_InterruptHandler()</a>, <a class="el" href="group__qspipsu__api.html#ga6ae727534cf55b878b9b1974dc72a625">XQspiPsu_InterruptTransfer()</a>, <a class="el" href="group__qspipsu__api.html#gaf5cca9a4c8ba075e4d9855a789cecc40">XQspiPsu_IntrDataTransfer()</a>, <a class="el" href="group__qspipsu__api.html#gaa77c471d9c50c3671a2f2a7c28707f4d">XQspiPsu_IntrSendData()</a>, <a class="el" href="group__qspipsu__api.html#ga83a88b04245b12857557e1d443cd3689">XQspiPsu_PolledMessageTransfer()</a>, <a class="el" href="group__qspipsu__api.html#ga61de390e2bc4af0ce77448a46763ea39">XQspiPsu_PolledTransfer()</a>, <a class="el" href="group__qspipsu__api.html#ga769969b43f91def18f7501555ec35b11">XQspiPsu_StartDmaTransfer()</a>, and <a class="el" href="group__qspipsu__api.html#ga8b201a022bb63afbaaf9afad23064761">XQspiPsu_TXRXSetup()</a>.</p>

</div>
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<a class="anchor" id="ga767a4572b5fe31cd9ff390c44d25e968"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define XQSPIPSU_MSG_FLAG_STRIPE&#160;&#160;&#160;0x1U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Stripe Msg flag. </p>

<p>Referenced by <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a4f09bf044ed26b11fc5489cb7b7ca1e6">BulkErase()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a97d8ab88e6002a97c30b95b66db231ea">DieErase()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a83a78784f5ba39b5e76b17a7e4a5ecad">FlashEnableQuadMode()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#ae8d1767607b58391ccb2d0103c2fd456">FlashEnterExit4BAddMode()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a8c7c38172a5258ee7cdfaef5a1a9af82">FlashErase()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#aaaad34739d0ad6d1fb5436c1d6428463">FlashRead()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a333c8e44e9af52811dee98f2cfcacf53">FlashWrite()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#aa6007218826af36e0df62b747de40de5">MultiDieRead()</a>, <a class="el" href="xqspipsu__polldata__polltimeout__interrupt__example_8c.html#a90454c300a46c3a9c1ba66d2a680b63c">QspiPsuConfigurePoll()</a>, <a class="el" href="group__qspipsu__api.html#ga08036c2fa8996e246d9d529fd2302af9">XQspiPsu_GenFifoEntryData()</a>, and <a class="el" href="group__qspipsu__api.html#gae55fa60e803534f990c0493b67eb02f1">XQspiPsu_PollDataConfig()</a>.</p>

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<a class="anchor" id="gae82f60c2162c93b8e302125914d8aab6"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define XQSPIPSU_MSG_FLAG_TX&#160;&#160;&#160;0x4U</td>
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      </table>
</div><div class="memdoc">

<p>Tx Msg flag. </p>

<p>Referenced by <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a4f09bf044ed26b11fc5489cb7b7ca1e6">BulkErase()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a97d8ab88e6002a97c30b95b66db231ea">DieErase()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a83a78784f5ba39b5e76b17a7e4a5ecad">FlashEnableQuadMode()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#ae8d1767607b58391ccb2d0103c2fd456">FlashEnterExit4BAddMode()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a8c7c38172a5258ee7cdfaef5a1a9af82">FlashErase()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#aaaad34739d0ad6d1fb5436c1d6428463">FlashRead()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#ac7c0194bd58d158581c699b8c07c309d">FlashReadID()</a>, <a class="el" href="xqspipsu__generic__flash__non__blocking__read__example_8c.html#a5e40a81a572bfacbf4d7a39af7905cea">FlashRegisterRead()</a>, <a class="el" href="xqspipsu__generic__flash__non__blocking__read__example_8c.html#a5b70ac0045f51c4babd8709e1c030752">FlashRegisterWrite()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a333c8e44e9af52811dee98f2cfcacf53">FlashWrite()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#aa6007218826af36e0df62b747de40de5">MultiDieRead()</a>, <a class="el" href="group__qspipsu__api.html#gaa345ea3ab3694a94a60e6217cb8d5e59">XQspiPsu_InterruptHandler()</a>, <a class="el" href="group__qspipsu__api.html#gaf5cca9a4c8ba075e4d9855a789cecc40">XQspiPsu_IntrDataTransfer()</a>, <a class="el" href="group__qspipsu__api.html#ga83a88b04245b12857557e1d443cd3689">XQspiPsu_PolledMessageTransfer()</a>, and <a class="el" href="group__qspipsu__api.html#ga8b201a022bb63afbaaf9afad23064761">XQspiPsu_TXRXSetup()</a>.</p>

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<a class="anchor" id="ga7270573aac2e897d40123dcb0a181aac"></a>
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<div class="memproto">
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        <tr>
          <td class="memname">#define XQSPIPSU_NUM_OPTIONS&#160;&#160;&#160;(sizeof(OptionsTable) / sizeof(OptionsMap))</td>
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      </table>
</div><div class="memdoc">

<p>Number of options in option table. </p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#ga0948cd1e33a60561c808e681306bcc65">XQspiPsu_ClearOptions()</a>, <a class="el" href="group__qspipsu__api.html#gab0d4072d9dfe0949c8e099342c2270f6">XQspiPsu_GetOptions()</a>, and <a class="el" href="group__qspipsu__api.html#gad0fea713a1ec2a4ce6159439e30f7cd7">XQspiPsu_SetOptions()</a>.</p>

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<a class="anchor" id="ga6e5ef224ee243dc64228ad60155a3f8b"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define XQSPIPSU_READMODE_DMA&#160;&#160;&#160;0x0U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>DMA read mode. </p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#gaaa69ec6da90deb760954ea3dcfd55d7f">XQspiPsu_Abort()</a>, <a class="el" href="group__qspipsu__api.html#ga803eccd67d1dfde416b54488865c1e9d">XQspiPsu_CfgInitialize()</a>, <a class="el" href="group__qspipsu__api.html#ga08036c2fa8996e246d9d529fd2302af9">XQspiPsu_GenFifoEntryData()</a>, <a class="el" href="group__qspipsu__api.html#ga6ae727534cf55b878b9b1974dc72a625">XQspiPsu_InterruptTransfer()</a>, <a class="el" href="group__qspipsu__api.html#gaf5cca9a4c8ba075e4d9855a789cecc40">XQspiPsu_IntrDataTransfer()</a>, <a class="el" href="group__qspipsu__api.html#ga73c0f0aa6fe6f1818b7ec15cdac0e7ed">XQspiPsu_IntrDummyDataTransfer()</a>, <a class="el" href="group__qspipsu__api.html#ga872f5fe8dbac27ca8867387e2185069d">XQspiPsu_IntrRecvData()</a>, <a class="el" href="group__qspipsu__api.html#ga5f083afb4ec79c542a7c7098a519d771">XQspiPsu_PollDataHandler()</a>, <a class="el" href="group__qspipsu__api.html#ga83a88b04245b12857557e1d443cd3689">XQspiPsu_PolledMessageTransfer()</a>, <a class="el" href="group__qspipsu__api.html#ga18829cabd2b37c4cf9fb2efa0632c398">XQspiPsu_PolledRecvData()</a>, <a class="el" href="group__qspipsu__api.html#gad77b041e10c03756bd0e3c197a63a2e3">XQspiPsu_RXSetup()</a>, <a class="el" href="group__qspipsu__api.html#ga3a37a08570be55ea07945a18a80306f3">XQspiPsu_SetReadMode()</a>, and <a class="el" href="group__qspipsu__api.html#ga769969b43f91def18f7501555ec35b11">XQspiPsu_StartDmaTransfer()</a>.</p>

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</div>
<a class="anchor" id="gafd11c8b8f44530c3670d2ac7497fb2fc"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XQSPIPSU_READMODE_IO&#160;&#160;&#160;0x1U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>IO read mode. </p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#ga08036c2fa8996e246d9d529fd2302af9">XQspiPsu_GenFifoEntryData()</a>, <a class="el" href="group__qspipsu__api.html#ga02f2ea05785dff6887625c5ef088a73b">XQspiPsu_SetIOMode()</a>, <a class="el" href="group__qspipsu__api.html#ga3a37a08570be55ea07945a18a80306f3">XQspiPsu_SetReadMode()</a>, and <a class="el" href="group__qspipsu__api.html#ga769969b43f91def18f7501555ec35b11">XQspiPsu_StartDmaTransfer()</a>.</p>

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<a class="anchor" id="gad6a88bdae8e13bd8cd48bb9e6d565610"></a>
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<div class="memproto">
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        <tr>
          <td class="memname">#define XQSPIPSU_RXADDR_OVER_32BIT&#160;&#160;&#160;0x100000000U</td>
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      </table>
</div><div class="memdoc">

<p>Rx address over 32 bit. </p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#ga6be41fd692a96516b0ce22591510c73d">XQspiPsu_CheckDmaDone()</a>, <a class="el" href="group__qspipsu__api.html#ga872f5fe8dbac27ca8867387e2185069d">XQspiPsu_IntrRecvData()</a>, <a class="el" href="group__qspipsu__api.html#ga18829cabd2b37c4cf9fb2efa0632c398">XQspiPsu_PolledRecvData()</a>, and <a class="el" href="group__qspipsu__api.html#gad77b041e10c03756bd0e3c197a63a2e3">XQspiPsu_RXSetup()</a>.</p>

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<a class="anchor" id="ga389021b0119ed0e51648c4d4b984b98a"></a>
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<div class="memproto">
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        <tr>
          <td class="memname">#define XQspiPsu_Select</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">Mask&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line"><a class="code" href="group__qspipsu.html#gaf9672b4f2ec43ccf15204998ff3df728">XQspiPsu_Out32</a>(((InstancePtr)-&gt;Config.BaseAddress) + \</div>
<div class="line">                       <a class="code" href="group__qspipsu.html#ga84156abbc51d17b988b1e82c584be10d">XQSPIPSU_SEL_OFFSET</a>, (Mask))</div>
<div class="ttc" id="group__qspipsu_html_ga84156abbc51d17b988b1e82c584be10d"><div class="ttname"><a href="group__qspipsu.html#ga84156abbc51d17b988b1e82c584be10d">XQSPIPSU_SEL_OFFSET</a></div><div class="ttdeci">#define XQSPIPSU_SEL_OFFSET</div><div class="ttdoc">Register: XQSPIPSU_SEL. </div><div class="ttdef"><b>Definition:</b> xqspipsu_hw.h:504</div></div>
<div class="ttc" id="group__qspipsu_html_gaf9672b4f2ec43ccf15204998ff3df728"><div class="ttname"><a href="group__qspipsu.html#gaf9672b4f2ec43ccf15204998ff3df728">XQspiPsu_Out32</a></div><div class="ttdeci">#define XQspiPsu_Out32</div><div class="ttdoc">Write the 32 bit register value. </div><div class="ttdef"><b>Definition:</b> xqspipsu_hw.h:965</div></div>
</div><!-- fragment -->
<p>select QSPI controller </p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#ga803eccd67d1dfde416b54488865c1e9d">XQspiPsu_CfgInitialize()</a>.</p>

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</div>
<a class="anchor" id="ga5d8490a76bf6be3a4655e3fa8e90a19f"></a>
<div class="memitem">
<div class="memproto">
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          <td class="memname">#define XQSPIPSU_SELECT_FLASH_BUS_BOTH&#160;&#160;&#160;0x3U</td>
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      </table>
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<p>Select both bus flash. </p>

<p>Referenced by <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#af45c38b76bbabbaf848a33cdc889ebfb">GetRealAddr()</a>, <a class="el" href="xqspipsu__polldata__polltimeout__interrupt__example_8c.html#a90454c300a46c3a9c1ba66d2a680b63c">QspiPsuConfigurePoll()</a>, and <a class="el" href="group__qspipsu__api.html#ga28338ae42ed4f7d2685ab18de2d21128">XQspiPsu_SelectFlash()</a>.</p>

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<a class="anchor" id="ga2d896ad5edf8b15e6dbd4d7a87517a35"></a>
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          <td class="memname">#define XQSPIPSU_SELECT_FLASH_BUS_LOWER&#160;&#160;&#160;0x1U</td>
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<p>Select lower bus flash. </p>

<p>Referenced by <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a8c7c38172a5258ee7cdfaef5a1a9af82">FlashErase()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#af45c38b76bbabbaf848a33cdc889ebfb">GetRealAddr()</a>, <a class="el" href="xqspipsu__polldata__polltimeout__interrupt__example_8c.html#a90454c300a46c3a9c1ba66d2a680b63c">QspiPsuConfigurePoll()</a>, <a class="el" href="xqspipsu__generic__flash__non__blocking__read__example_8c.html#a653eb600a5672ee9c7664f2720a05258">QspiPsuFlashNonBlockingReadExample()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a1d5699f770ac9e1ceaf76398b568b9ee">QspiPsuInterruptFlashExample()</a>, <a class="el" href="xqspipsu__generic__flash__polled__64bit__dma__r5__example_8c.html#ac7a0e7a44578f580f46491eb6f6ce726">QspiPsuPolledFlashExample()</a>, <a class="el" href="xqspipsu__write__protect__example_8c.html#a191ca904211eda1c8b5dddc5e6a16331">QspiPsuWriteProtectFlashExample()</a>, <a class="el" href="group__qspipsu__api.html#ga6f3b7fc81ae5c50ee3ea373d80b4b542">XQspiPsu_CreatePollDataConfig()</a>, and <a class="el" href="group__qspipsu__api.html#ga28338ae42ed4f7d2685ab18de2d21128">XQspiPsu_SelectFlash()</a>.</p>

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<a class="anchor" id="ga9eeab1d9cd47c4a0281d9188d3072444"></a>
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          <td class="memname">#define XQSPIPSU_SELECT_FLASH_BUS_UPPER&#160;&#160;&#160;0x2U</td>
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<p>Select upper bus flash. </p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#ga28338ae42ed4f7d2685ab18de2d21128">XQspiPsu_SelectFlash()</a>.</p>

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<a class="anchor" id="gab8fb3a2887dbf0331cc9057afea0ec53"></a>
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          <td class="memname">#define XQSPIPSU_SELECT_FLASH_CS_BOTH&#160;&#160;&#160;0x3U</td>
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<p>Select both flash. </p>

<p>Referenced by <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#af45c38b76bbabbaf848a33cdc889ebfb">GetRealAddr()</a>, <a class="el" href="xqspipsu__polldata__polltimeout__interrupt__example_8c.html#a90454c300a46c3a9c1ba66d2a680b63c">QspiPsuConfigurePoll()</a>, and <a class="el" href="group__qspipsu__api.html#ga28338ae42ed4f7d2685ab18de2d21128">XQspiPsu_SelectFlash()</a>.</p>

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<a class="anchor" id="ga4c5dd4c0387f6ae12a78b86c653bb74d"></a>
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          <td class="memname">#define XQSPIPSU_SELECT_FLASH_CS_LOWER&#160;&#160;&#160;0x1U</td>
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<p>Select lower flash. </p>

<p>Referenced by <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a8c7c38172a5258ee7cdfaef5a1a9af82">FlashErase()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#af45c38b76bbabbaf848a33cdc889ebfb">GetRealAddr()</a>, <a class="el" href="xqspipsu__polldata__polltimeout__interrupt__example_8c.html#a90454c300a46c3a9c1ba66d2a680b63c">QspiPsuConfigurePoll()</a>, <a class="el" href="xqspipsu__generic__flash__non__blocking__read__example_8c.html#a653eb600a5672ee9c7664f2720a05258">QspiPsuFlashNonBlockingReadExample()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a1d5699f770ac9e1ceaf76398b568b9ee">QspiPsuInterruptFlashExample()</a>, <a class="el" href="xqspipsu__generic__flash__polled__64bit__dma__r5__example_8c.html#ac7a0e7a44578f580f46491eb6f6ce726">QspiPsuPolledFlashExample()</a>, <a class="el" href="xqspipsu__write__protect__example_8c.html#a191ca904211eda1c8b5dddc5e6a16331">QspiPsuWriteProtectFlashExample()</a>, and <a class="el" href="group__qspipsu__api.html#ga28338ae42ed4f7d2685ab18de2d21128">XQspiPsu_SelectFlash()</a>.</p>

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<a class="anchor" id="ga2211df126779f654595c9663f5624ba4"></a>
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          <td class="memname">#define XQSPIPSU_SELECT_FLASH_CS_UPPER&#160;&#160;&#160;0x2U</td>
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<p>Select upper flash. </p>

<p>Referenced by <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a8c7c38172a5258ee7cdfaef5a1a9af82">FlashErase()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#af45c38b76bbabbaf848a33cdc889ebfb">GetRealAddr()</a>, and <a class="el" href="group__qspipsu__api.html#ga28338ae42ed4f7d2685ab18de2d21128">XQspiPsu_SelectFlash()</a>.</p>

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<a class="anchor" id="gaa57e6e6b6efaaa981a9a81ae9db3d78a"></a>
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          <td class="memname">#define XQSPIPSU_SELECT_MODE_DUALSPI&#160;&#160;&#160;0x2U</td>
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<p>Select dual SPI mode. </p>

<p>Referenced by <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#aaaad34739d0ad6d1fb5436c1d6428463">FlashRead()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#aa6007218826af36e0df62b747de40de5">MultiDieRead()</a>, and <a class="el" href="group__qspipsu__api.html#gae7bfe0aff5a064a01b0f822f46b26deb">XQspiPsu_SelectSpiMode()</a>.</p>

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<a class="anchor" id="ga6750df2d9d9169fdef76bfc957ae501c"></a>
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          <td class="memname">#define XQSPIPSU_SELECT_MODE_QUADSPI&#160;&#160;&#160;0x4U</td>
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<p>Select quad SPI mode. </p>

<p>Referenced by <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#aaaad34739d0ad6d1fb5436c1d6428463">FlashRead()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#aa6007218826af36e0df62b747de40de5">MultiDieRead()</a>, and <a class="el" href="group__qspipsu__api.html#gae7bfe0aff5a064a01b0f822f46b26deb">XQspiPsu_SelectSpiMode()</a>.</p>

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<a class="anchor" id="ga185ba58041ded76c03bb18ad69e783af"></a>
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          <td class="memname">#define XQSPIPSU_SELECT_MODE_SPI&#160;&#160;&#160;0x1U</td>
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<p>Select SPI mode. </p>

<p>Referenced by <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a4f09bf044ed26b11fc5489cb7b7ca1e6">BulkErase()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a97d8ab88e6002a97c30b95b66db231ea">DieErase()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a83a78784f5ba39b5e76b17a7e4a5ecad">FlashEnableQuadMode()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#ae8d1767607b58391ccb2d0103c2fd456">FlashEnterExit4BAddMode()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a8c7c38172a5258ee7cdfaef5a1a9af82">FlashErase()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#aaaad34739d0ad6d1fb5436c1d6428463">FlashRead()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#ac7c0194bd58d158581c699b8c07c309d">FlashReadID()</a>, <a class="el" href="xqspipsu__generic__flash__non__blocking__read__example_8c.html#a5e40a81a572bfacbf4d7a39af7905cea">FlashRegisterRead()</a>, <a class="el" href="xqspipsu__generic__flash__non__blocking__read__example_8c.html#a5b70ac0045f51c4babd8709e1c030752">FlashRegisterWrite()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a333c8e44e9af52811dee98f2cfcacf53">FlashWrite()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#aa6007218826af36e0df62b747de40de5">MultiDieRead()</a>, <a class="el" href="xqspipsu__polldata__polltimeout__interrupt__example_8c.html#a90454c300a46c3a9c1ba66d2a680b63c">QspiPsuConfigurePoll()</a>, and <a class="el" href="group__qspipsu__api.html#gae7bfe0aff5a064a01b0f822f46b26deb">XQspiPsu_SelectSpiMode()</a>.</p>

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<a class="anchor" id="ga9d60815d3d62d01558f5ece03f79da51"></a>
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          <td class="memname">#define XQSPIPSU_SET_WP&#160;&#160;&#160;1</td>
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<p>GQSPI configuration to toggle WP of flash. </p>

<p>Referenced by <a class="el" href="xqspipsu__write__protect__example_8c.html#a191ca904211eda1c8b5dddc5e6a16331">QspiPsuWriteProtectFlashExample()</a>.</p>

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<h2 class="groupheader">Typedef Documentation</h2>
<a class="anchor" id="ga4fcad0707fd0557232bc94a8c3ba1fea"></a>
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          <td class="memname">typedef void(* XQspiPsu_StatusHandler)(const void *CallBackRef, u32 StatusEvent, u32 ByteCount)</td>
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<p>The handler data type allows the user to define a callback function to handle the asynchronous processing for the QSPIPSU device. </p>
<p>The application using this driver is expected to define a handler of this type to support interrupt driven mode. The handler executes in an interrupt context, so only minimal processing should be performed.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">CallBackRef</td><td>Callback reference passed in by the upper layer when setting the callback functions, and passed back to the upper layer when the callback is invoked. Its type is not important to the driver, so it is a void pointer. </td></tr>
    <tr><td class="paramname">StatusEvent</td><td>Holds one or more status events that have occurred. See <a class="el" href="group__qspipsu__api.html#ga02ea5e95c8939c2be78d26c255a6ba6f" title="Sets the status callback function, the status handler, which the driver calls when it encounters cond...">XQspiPsu_SetStatusHandler()</a> for details on the status events that can be passed in the callback. </td></tr>
    <tr><td class="paramname">ByteCount</td><td>Indicates how many bytes of data were successfully transferred. This may be less than the number of bytes requested if the status event indicates an error. </td></tr>
  </table>
  </dd>
</dl>

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<h2 class="groupheader">Function Documentation</h2>
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          <td class="memname">void XQspiPsu_Abort </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
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<p>Aborts a transfer in progress. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___config.html#a4048264c3ac6b3455c0295eeacac874b">XQspiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="struct_x_qspi_psu.html#ac08fabd6f7822d5aeffe328e45266196">XQspiPsu::GenFifoEntries</a>, <a class="el" href="struct_x_qspi_psu.html#ad253a7c807935d5b3178966e74f6821c">XQspiPsu::IsBusy</a>, <a class="el" href="group__qspipsu__api.html#ga02055aef4b0f9a801005ebdc7b556157">MAX_DELAY_CNT</a>, <a class="el" href="struct_x_qspi_psu.html#abcf49b02b0b90a7eecf9fb5ba40ac0b3">XQspiPsu::ReadMode</a>, <a class="el" href="struct_x_qspi_psu.html#ac45ddbc82ca891a58fbc9f25150fce30">XQspiPsu::RxBytes</a>, <a class="el" href="struct_x_qspi_psu.html#a489eab59d93d119fe5776f8d440ec2bd">XQspiPsu::TxBytes</a>, <a class="el" href="group__qspipsu.html#ga1d76a2f706f3988da79345132e484303">XQSPIPSU_CFG_OFFSET</a>, <a class="el" href="group__qspipsu.html#gac14f429fa7d15b5c4bf2808ed08e7120">XQSPIPSU_FIFO_CTRL_OFFSET</a>, <a class="el" href="group__qspipsu.html#ga5eb684785dfb0a249b18126089624b91">XQSPIPSU_IDR_OFFSET</a>, <a class="el" href="group__qspipsu.html#gadae24d033fb12577e3e4eda5427a950a">XQSPIPSU_ISR_OFFSET</a>, <a class="el" href="group__qspipsu__api.html#ga6e5ef224ee243dc64228ad60155a3f8b">XQSPIPSU_READMODE_DMA</a>, <a class="el" href="group__qspipsu.html#gab88bcdb0f53b21b79cd0805cfd14cb89">XQspiPsu_ReadReg</a>, and <a class="el" href="group__qspipsu.html#ga584ee0482b95d3f49353438ca58fb180">XQspiPsu_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#ga799b60ee7157ed46b84475677aa0dc03">XQspiPsu_Reset()</a>.</p>

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          <td class="memname">s32 XQspiPsu_CfgInitialize </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">const <a class="el" href="struct_x_qspi_psu___config.html">XQspiPsu_Config</a> *&#160;</td>
          <td class="paramname"><em>ConfigPtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">UINTPTR&#160;</td>
          <td class="paramname"><em>EffectiveAddr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Initializes a specific <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance as such the driver is ready to use. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance. </td></tr>
    <tr><td class="paramname">ConfigPtr</td><td>Reference to a structure containing information about a specific QSPIPSU device. This function initializes an InstancePtr object for a specific device specified by the contents of Config. </td></tr>
    <tr><td class="paramname">EffectiveAddr</td><td>Device base address in the virtual memory address space. The caller is responsible for keeping the address mapping from EffectiveAddr to the device physical base address unchanged once this function is invoked. Unexpected errors may occur if the address mapping changes after this function is called. If address translation is not used, use ConfigPtr-&gt;Config. BaseAddress for this device.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if successful.</li>
<li>XST_DEVICE_IS_STARTED if the device is already started. It must be stopped to re-initialize.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___config.html#a4048264c3ac6b3455c0295eeacac874b">XQspiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_qspi_psu___config.html#a6633f2a853b394ffb75b4ea080d0a8cd">XQspiPsu_Config::BaudRateDiv</a>, <a class="el" href="struct_x_qspi_psu___config.html#afb9b153a78b4112212d7850efd1c6add">XQspiPsu_Config::BusWidth</a>, <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="struct_x_qspi_psu___config.html#aa771e1e018426eb1f68fe5241ed45e71">XQspiPsu_Config::ConnectionMode</a>, <a class="el" href="struct_x_qspi_psu.html#adc71282aafc4eb9a8f37e672bf3bec51">XQspiPsu::GenFifoBufferPtr</a>, <a class="el" href="struct_x_qspi_psu.html#a04675183fe2c3b312d0866a2a2f9b906">XQspiPsu::GenFifoBus</a>, <a class="el" href="struct_x_qspi_psu.html#adbe5c279e1de1f98d3f63bc30cd2d2a4">XQspiPsu::GenFifoCS</a>, <a class="el" href="struct_x_qspi_psu.html#ac08fabd6f7822d5aeffe328e45266196">XQspiPsu::GenFifoEntries</a>, <a class="el" href="struct_x_qspi_psu___config.html#a630de071c5c249ec4bf502fff7f8daaa">XQspiPsu_Config::InputClockHz</a>, <a class="el" href="struct_x_qspi_psu.html#ad253a7c807935d5b3178966e74f6821c">XQspiPsu::IsBusy</a>, <a class="el" href="struct_x_qspi_psu___config.html#a400769b796e581c883c34c63320c51b3">XQspiPsu_Config::IsCacheCoherent</a>, <a class="el" href="struct_x_qspi_psu___config.html#ab141b30f1c3f753a9805200c580bf716">XQspiPsu_Config::IsFbClock</a>, <a class="el" href="struct_x_qspi_psu.html#a159f22a8fb11877c4b4b2888d8153fd2">XQspiPsu::IsManualstart</a>, <a class="el" href="struct_x_qspi_psu.html#ae6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a>, <a class="el" href="struct_x_qspi_psu.html#a1e1d64fc74cfc2442eedaf0eb3f97263">XQspiPsu::IsUnaligned</a>, <a class="el" href="struct_x_qspi_psu.html#abcf49b02b0b90a7eecf9fb5ba40ac0b3">XQspiPsu::ReadMode</a>, <a class="el" href="struct_x_qspi_psu.html#a5464cdad6cf047e5228f13cb3a761c3f">XQspiPsu::RecvBufferPtr</a>, <a class="el" href="struct_x_qspi_psu.html#ac45ddbc82ca891a58fbc9f25150fce30">XQspiPsu::RxBytes</a>, <a class="el" href="struct_x_qspi_psu.html#a2a11cb56ad7d4b388a4669359156ab0b">XQspiPsu::SendBufferPtr</a>, <a class="el" href="struct_x_qspi_psu.html#a2ebf04ce847da29d6069795db26fbccc">XQspiPsu::StatusHandler</a>, <a class="el" href="struct_x_qspi_psu.html#a489eab59d93d119fe5776f8d440ec2bd">XQspiPsu::TxBytes</a>, <a class="el" href="group__qspipsu__api.html#gaa44815f385a69052a3f637f57428f506">XQspiPsu_Enable</a>, <a class="el" href="group__qspipsu__api.html#ga6e5ef224ee243dc64228ad60155a3f8b">XQSPIPSU_READMODE_DMA</a>, <a class="el" href="group__qspipsu__api.html#ga799b60ee7157ed46b84475677aa0dc03">XQspiPsu_Reset()</a>, and <a class="el" href="group__qspipsu__api.html#ga389021b0119ed0e51648c4d4b984b98a">XQspiPsu_Select</a>.</p>

<p>Referenced by <a class="el" href="xqspipsu__generic__flash__non__blocking__read__example_8c.html#a653eb600a5672ee9c7664f2720a05258">QspiPsuFlashNonBlockingReadExample()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a1d5699f770ac9e1ceaf76398b568b9ee">QspiPsuInterruptFlashExample()</a>, <a class="el" href="xqspipsu__generic__flash__polled__64bit__dma__r5__example_8c.html#ac7a0e7a44578f580f46491eb6f6ce726">QspiPsuPolledFlashExample()</a>, and <a class="el" href="xqspipsu__write__protect__example_8c.html#a191ca904211eda1c8b5dddc5e6a16331">QspiPsuWriteProtectFlashExample()</a>.</p>

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          <td class="memname">s32 XQspiPsu_CheckDmaDone </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
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<p>Checks for DMA transfer complete. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if DMA transfer complete.</li>
<li>XST_FAILURE if DMA transfer is not completed.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___config.html#a4048264c3ac6b3455c0295eeacac874b">XQspiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="struct_x_qspi_psu.html#ad253a7c807935d5b3178966e74f6821c">XQspiPsu::IsBusy</a>, <a class="el" href="struct_x_qspi_psu___config.html#a400769b796e581c883c34c63320c51b3">XQspiPsu_Config::IsCacheCoherent</a>, <a class="el" href="struct_x_qspi_psu.html#a159f22a8fb11877c4b4b2888d8153fd2">XQspiPsu::IsManualstart</a>, <a class="el" href="struct_x_qspi_psu.html#ae6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a>, <a class="el" href="group__qspipsu__api.html#ga02055aef4b0f9a801005ebdc7b556157">MAX_DELAY_CNT</a>, <a class="el" href="struct_x_qspi_psu.html#a29f89d26e8b2046a17065912e1a7b365">XQspiPsu::Msg</a>, <a class="el" href="struct_x_qspi_psu___msg.html#a95b9e43bb920ea5055db6b1971d7f780">XQspiPsu_Msg::RxAddr64bit</a>, <a class="el" href="struct_x_qspi_psu___msg.html#a1fb697c64fd14580822f4baf50f26df1">XQspiPsu_Msg::RxBfrPtr</a>, <a class="el" href="struct_x_qspi_psu.html#ac45ddbc82ca891a58fbc9f25150fce30">XQspiPsu::RxBytes</a>, <a class="el" href="struct_x_qspi_psu___msg.html#ac9a904e6a2fa8d5668e554615a59bbb5">XQspiPsu_Msg::Xfer64bit</a>, <a class="el" href="group__qspipsu.html#ga1d76a2f706f3988da79345132e484303">XQSPIPSU_CFG_OFFSET</a>, <a class="el" href="group__qspipsu.html#gadae24d033fb12577e3e4eda5427a950a">XQSPIPSU_ISR_OFFSET</a>, <a class="el" href="group__qspipsu.html#gab88bcdb0f53b21b79cd0805cfd14cb89">XQspiPsu_ReadReg</a>, <a class="el" href="group__qspipsu__api.html#gad6a88bdae8e13bd8cd48bb9e6d565610">XQSPIPSU_RXADDR_OVER_32BIT</a>, and <a class="el" href="group__qspipsu.html#ga584ee0482b95d3f49353438ca58fb180">XQspiPsu_WriteReg</a>.</p>

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          <td class="memname">s32 XQspiPsu_ClearOptions </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Options</em>&#160;</td>
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        <tr>
          <td></td>
          <td>)</td>
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<p>Resets the options for the QSPIPSU device driver. </p>
<p>The options control how the device behaves relative to the QSPIPSU bus. The device must be idle rather than busy transferring data before setting these device options.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance. </td></tr>
    <tr><td class="paramname">Options</td><td>Contains the specified options to be set. This is a bit mask where a 1 indicates the option should be turned OFF and a 0 indicates no action. One or more bit values may be contained in the mask. See the bit definitions named XQSPIPSU_*_OPTIONS in the file <a class="el" href="xqspipsu_8h.html">xqspipsu.h</a>.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if options are successfully set.</li>
<li>XST_DEVICE_BUSY if the device is currently transferring data. The transfer must complete or be aborted before setting options.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>This function is not thread-safe. </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___config.html#a4048264c3ac6b3455c0295eeacac874b">XQspiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="struct_x_qspi_psu.html#ad253a7c807935d5b3178966e74f6821c">XQspiPsu::IsBusy</a>, <a class="el" href="struct_x_qspi_psu.html#a159f22a8fb11877c4b4b2888d8153fd2">XQspiPsu::IsManualstart</a>, <a class="el" href="struct_x_qspi_psu.html#ae6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a>, <a class="el" href="group__qspipsu.html#ga1d76a2f706f3988da79345132e484303">XQSPIPSU_CFG_OFFSET</a>, <a class="el" href="group__qspipsu__api.html#ga47c246bab4c5d4f6c8ff84e44049adc9">XQSPIPSU_MANUAL_START_OPTION</a>, <a class="el" href="group__qspipsu__api.html#ga7270573aac2e897d40123dcb0a181aac">XQSPIPSU_NUM_OPTIONS</a>, <a class="el" href="group__qspipsu.html#gab88bcdb0f53b21b79cd0805cfd14cb89">XQspiPsu_ReadReg</a>, and <a class="el" href="group__qspipsu.html#ga584ee0482b95d3f49353438ca58fb180">XQspiPsu_WriteReg</a>.</p>

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          <td>(</td>
          <td class="paramtype">const <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">const <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *&#160;</td>
          <td class="paramname"><em>FlashMsg</em>&#160;</td>
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<p>Creates Poll configuration register data to write. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance.</td></tr>
    <tr><td class="paramname">FlashMsg</td><td>Pointer to the structure containing transfer data.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu.html#a04675183fe2c3b312d0866a2a2f9b906">XQspiPsu::GenFifoBus</a>, <a class="el" href="struct_x_qspi_psu.html#ae6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a>, <a class="el" href="struct_x_qspi_psu___msg.html#a3899d4d75a4cb3e0cdacbd659b53c8df">XQspiPsu_Msg::PollBusMask</a>, <a class="el" href="struct_x_qspi_psu___msg.html#a1a7d94d20674d2af431203e779c3a58a">XQspiPsu_Msg::PollData</a>, and <a class="el" href="group__qspipsu__api.html#ga2d896ad5edf8b15e6dbd4d7a87517a35">XQSPIPSU_SELECT_FLASH_BUS_LOWER</a>.</p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#gae55fa60e803534f990c0493b67eb02f1">XQspiPsu_PollDataConfig()</a>.</p>

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          <td class="memname">void XQspiPsu_FillTxFifo </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *&#160;</td>
          <td class="paramname"><em>Msg</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Size</em>&#160;</td>
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        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
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<p>Fills the TX FIFO as long as there is room in the FIFO or the bytes required to be transmitted. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance. </td></tr>
    <tr><td class="paramname">Msg</td><td>Pointer to the structure containing transfer data. </td></tr>
    <tr><td class="paramname">Size</td><td>Number of bytes to be transmitted.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___config.html#a4048264c3ac6b3455c0295eeacac874b">XQspiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="struct_x_qspi_psu.html#ae6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a>, <a class="el" href="struct_x_qspi_psu___msg.html#a09fc20d95cb26f29a649207d0b495f58">XQspiPsu_Msg::TxBfrPtr</a>, <a class="el" href="struct_x_qspi_psu.html#a489eab59d93d119fe5776f8d440ec2bd">XQspiPsu::TxBytes</a>, <a class="el" href="group__qspipsu.html#ga4884f0160746c6696598ef6dda1fc9ff">XQSPIPSU_TXD_OFFSET</a>, and <a class="el" href="group__qspipsu.html#ga584ee0482b95d3f49353438ca58fb180">XQspiPsu_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#gaa77c471d9c50c3671a2f2a7c28707f4d">XQspiPsu_IntrSendData()</a>, <a class="el" href="group__qspipsu__api.html#gad8adcb1fd07106bb0add26e24a4c0084">XQspiPsu_PolledSendData()</a>, and <a class="el" href="group__qspipsu__api.html#ga58406ccb7e182a93cd3a47c060de091e">XQspiPsu_TXSetup()</a>.</p>

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          <td class="memname">void XQspiPsu_GenFifoEntryData </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *&#160;</td>
          <td class="paramname"><em>Msg</em>&#160;</td>
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          <td>)</td>
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<p>Writes the GENFIFO entries to transmit the messages requested. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance. </td></tr>
    <tr><td class="paramname">Msg</td><td>Pointer to the structure containing transfer data.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if successful.</li>
<li>XST_FAILURE if transfer fails.</li>
<li>XST_DEVICE_BUSY if a transfer is already in progress. </li>
</ul>
</dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___config.html#a4048264c3ac6b3455c0295eeacac874b">XQspiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_qspi_psu___msg.html#ae4dae8ba728f7da9b6f31bb39c62b81f">XQspiPsu_Msg::BusWidth</a>, <a class="el" href="struct_x_qspi_psu___msg.html#a420a0720c6eb8d77aae09c829185b160">XQspiPsu_Msg::ByteCount</a>, <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="struct_x_qspi_psu___msg.html#a2c11ea724a05dd7d68b8e4adcb7ac46e">XQspiPsu_Msg::Flags</a>, <a class="el" href="struct_x_qspi_psu.html#a04675183fe2c3b312d0866a2a2f9b906">XQspiPsu::GenFifoBus</a>, <a class="el" href="struct_x_qspi_psu.html#adbe5c279e1de1f98d3f63bc30cd2d2a4">XQspiPsu::GenFifoCS</a>, <a class="el" href="struct_x_qspi_psu.html#ae6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a>, <a class="el" href="struct_x_qspi_psu.html#a1e1d64fc74cfc2442eedaf0eb3f97263">XQspiPsu::IsUnaligned</a>, <a class="el" href="struct_x_qspi_psu.html#abcf49b02b0b90a7eecf9fb5ba40ac0b3">XQspiPsu::ReadMode</a>, <a class="el" href="group__qspipsu.html#ga1d76a2f706f3988da79345132e484303">XQSPIPSU_CFG_OFFSET</a>, <a class="el" href="group__qspipsu.html#ga3bfe2023b6a6ce56e9d13f130bd1c86d">XQSPIPSU_GEN_FIFO_OFFSET</a>, <a class="el" href="group__qspipsu__api.html#ga7fc4cdebc35bb7b5d3ca9128917c131c">XQspiPsu_GenFifoEntryDataLen()</a>, <a class="el" href="group__qspipsu__api.html#gacdde904168f5899e4ba6ccd59c360849">XQSPIPSU_MSG_FLAG_RX</a>, <a class="el" href="group__qspipsu__api.html#ga767a4572b5fe31cd9ff390c44d25e968">XQSPIPSU_MSG_FLAG_STRIPE</a>, <a class="el" href="group__qspipsu__api.html#ga6e5ef224ee243dc64228ad60155a3f8b">XQSPIPSU_READMODE_DMA</a>, <a class="el" href="group__qspipsu__api.html#gafd11c8b8f44530c3670d2ac7497fb2fc">XQSPIPSU_READMODE_IO</a>, <a class="el" href="group__qspipsu.html#gab88bcdb0f53b21b79cd0805cfd14cb89">XQspiPsu_ReadReg</a>, <a class="el" href="group__qspipsu__api.html#gae7bfe0aff5a064a01b0f822f46b26deb">XQspiPsu_SelectSpiMode()</a>, <a class="el" href="group__qspipsu__api.html#ga8b201a022bb63afbaaf9afad23064761">XQspiPsu_TXRXSetup()</a>, and <a class="el" href="group__qspipsu.html#ga584ee0482b95d3f49353438ca58fb180">XQspiPsu_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#ga6ae727534cf55b878b9b1974dc72a625">XQspiPsu_InterruptTransfer()</a>, <a class="el" href="group__qspipsu__api.html#ga73c0f0aa6fe6f1818b7ec15cdac0e7ed">XQspiPsu_IntrDummyDataTransfer()</a>, <a class="el" href="group__qspipsu__api.html#ga872f5fe8dbac27ca8867387e2185069d">XQspiPsu_IntrRecvData()</a>, <a class="el" href="group__qspipsu__api.html#ga83a88b04245b12857557e1d443cd3689">XQspiPsu_PolledMessageTransfer()</a>, and <a class="el" href="group__qspipsu__api.html#ga769969b43f91def18f7501555ec35b11">XQspiPsu_StartDmaTransfer()</a>.</p>

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          <td class="memname">void XQspiPsu_GenFifoEntryDataLen </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *&#160;</td>
          <td class="paramname"><em>Msg</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32 *&#160;</td>
          <td class="paramname"><em>GenFifoEntry</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Writes the data length to GENFIFO entries to be transmitted or received. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance. </td></tr>
    <tr><td class="paramname">Msg</td><td>Pointer to the structure containing transfer data. </td></tr>
    <tr><td class="paramname">GenFifoEntry</td><td>Pointer to the variable in which GENFIFO mask is returned to the calling function.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if successful.</li>
<li>XST_FAILURE if transfer fails.</li>
<li>XST_DEVICE_BUSY if a transfer is already in progress. </li>
</ul>
</dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___config.html#a4048264c3ac6b3455c0295eeacac874b">XQspiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_qspi_psu___msg.html#a420a0720c6eb8d77aae09c829185b160">XQspiPsu_Msg::ByteCount</a>, <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="struct_x_qspi_psu.html#ae6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a>, <a class="el" href="group__qspipsu.html#ga3bfe2023b6a6ce56e9d13f130bd1c86d">XQSPIPSU_GEN_FIFO_OFFSET</a>, <a class="el" href="group__qspipsu__api.html#ga9910c1e3f79127836cade9970a9df537">XQSPIPSU_GENFIFO_EXP_START</a>, <a class="el" href="group__qspipsu.html#gaa8a6c468b32dd07920d5a47ec6294d79">XQSPIPSU_GENFIFO_IMM_DATA_MASK</a>, and <a class="el" href="group__qspipsu.html#ga584ee0482b95d3f49353438ca58fb180">XQspiPsu_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#ga08036c2fa8996e246d9d529fd2302af9">XQspiPsu_GenFifoEntryData()</a>.</p>

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          <td class="memname">u32 XQspiPsu_GetOptions </td>
          <td>(</td>
          <td class="paramtype">const <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
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<p>Gets the options for the QSPIPSU device. </p>
<p>The options control how the device behaves relative to the QSPIPSU bus.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd></dd></dl>
<p>Options contains the specified options currently set. This is a bit value where a 1 means the option is on, and a 0 means the option is off. See the bit definitions named XQSPIPSU_*_OPTIONS in file <a class="el" href="xqspipsu_8h.html">xqspipsu.h</a>.</p>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___config.html#a4048264c3ac6b3455c0295eeacac874b">XQspiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="struct_x_qspi_psu.html#ae6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a>, <a class="el" href="group__qspipsu.html#ga1d76a2f706f3988da79345132e484303">XQSPIPSU_CFG_OFFSET</a>, <a class="el" href="group__qspipsu__api.html#ga7270573aac2e897d40123dcb0a181aac">XQSPIPSU_NUM_OPTIONS</a>, and <a class="el" href="group__qspipsu.html#gab88bcdb0f53b21b79cd0805cfd14cb89">XQspiPsu_ReadReg</a>.</p>

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          <td class="memname">void XQspiPsu_Idle </td>
          <td>(</td>
          <td class="paramtype">const <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>Stops the transfer of data to internal DST FIFO from stream interface and also stops the issuing of new write commands to memory. </p>
<p>By calling this API, any ongoing Dma transfers will be paused and DMA will not issue AXI write commands to memory</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___config.html#a4048264c3ac6b3455c0295eeacac874b">XQspiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="struct_x_qspi_psu.html#ae6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a>, <a class="el" href="group__qspipsu.html#ga5b7b95790bfeb5bfb3dfd63e4a5e76cc">XQSPIPSU_EN_OFFSET</a>, <a class="el" href="group__qspipsu.html#gab88bcdb0f53b21b79cd0805cfd14cb89">XQspiPsu_ReadReg</a>, and <a class="el" href="group__qspipsu.html#ga584ee0482b95d3f49353438ca58fb180">XQspiPsu_WriteReg</a>.</p>

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          <td class="memname">s32 XQspiPsu_InterruptHandler </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
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<p>Handles interrupt based transfers by acting on GENFIFO and DMA interurpts. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if successful.</li>
<li>XST_FAILURE if transfer fails.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___msg.html#a2c11ea724a05dd7d68b8e4adcb7ac46e">XQspiPsu_Msg::Flags</a>, <a class="el" href="struct_x_qspi_psu.html#ae6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a>, <a class="el" href="struct_x_qspi_psu.html#a29f89d26e8b2046a17065912e1a7b365">XQspiPsu::Msg</a>, <a class="el" href="struct_x_qspi_psu.html#ad39fab4f939983f961777ae33212f14c">XQspiPsu::MsgCnt</a>, <a class="el" href="struct_x_qspi_psu.html#af6710ef68edf3ff0a833c088207ba227">XQspiPsu::NumMsg</a>, <a class="el" href="group__qspipsu__api.html#gaf5cca9a4c8ba075e4d9855a789cecc40">XQspiPsu_IntrDataTransfer()</a>, <a class="el" href="group__qspipsu__api.html#ga73c0f0aa6fe6f1818b7ec15cdac0e7ed">XQspiPsu_IntrDummyDataTransfer()</a>, <a class="el" href="group__qspipsu__api.html#gad4bd22b7d06c85885fafdae994e1c86a">XQSPIPSU_MSG_FLAG_POLL</a>, <a class="el" href="group__qspipsu__api.html#gacdde904168f5899e4ba6ccd59c360849">XQSPIPSU_MSG_FLAG_RX</a>, <a class="el" href="group__qspipsu__api.html#gae82f60c2162c93b8e302125914d8aab6">XQSPIPSU_MSG_FLAG_TX</a>, and <a class="el" href="group__qspipsu__api.html#ga5f083afb4ec79c542a7c7098a519d771">XQspiPsu_PollDataHandler()</a>.</p>

<p>Referenced by <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a1d5699f770ac9e1ceaf76398b568b9ee">QspiPsuInterruptFlashExample()</a>, and <a class="el" href="xqspipsu__write__protect__example_8c.html#a191ca904211eda1c8b5dddc5e6a16331">QspiPsuWriteProtectFlashExample()</a>.</p>

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          <td class="memname">s32 XQspiPsu_InterruptTransfer </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *&#160;</td>
          <td class="paramname"><em>Msg</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>NumMsg</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Initiates a transfer on the bus and enables interrupts. </p>
<p>The transfer is completed by the interrupt handler. The messages passed are all transferred on the bus between one CS assert and de-assert.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance. </td></tr>
    <tr><td class="paramname">Msg</td><td>Pointer to the structure containing transfer data. </td></tr>
    <tr><td class="paramname">NumMsg</td><td>Number of messages to be transferred.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if successful.</li>
<li>XST_FAILURE if transfer fails.</li>
<li>XST_DEVICE_BUSY if a transfer is already in progress.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___config.html#a4048264c3ac6b3455c0295eeacac874b">XQspiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="struct_x_qspi_psu___msg.html#a2c11ea724a05dd7d68b8e4adcb7ac46e">XQspiPsu_Msg::Flags</a>, <a class="el" href="struct_x_qspi_psu.html#ad253a7c807935d5b3178966e74f6821c">XQspiPsu::IsBusy</a>, <a class="el" href="struct_x_qspi_psu.html#ae6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a>, <a class="el" href="struct_x_qspi_psu.html#a29f89d26e8b2046a17065912e1a7b365">XQspiPsu::Msg</a>, <a class="el" href="struct_x_qspi_psu.html#ad39fab4f939983f961777ae33212f14c">XQspiPsu::MsgCnt</a>, <a class="el" href="struct_x_qspi_psu.html#af6710ef68edf3ff0a833c088207ba227">XQspiPsu::NumMsg</a>, <a class="el" href="struct_x_qspi_psu.html#abcf49b02b0b90a7eecf9fb5ba40ac0b3">XQspiPsu::ReadMode</a>, <a class="el" href="group__qspipsu__api.html#gafa633d08d4bcacadc20f2696665edb75">XQSPIPSU_DMA_BYTES_MAX</a>, <a class="el" href="group__qspipsu__api.html#ga08036c2fa8996e246d9d529fd2302af9">XQspiPsu_GenFifoEntryData()</a>, <a class="el" href="group__qspipsu.html#gab8e3a4621239cb556fc8acdd0a6d10b6">XQSPIPSU_IER_OFFSET</a>, <a class="el" href="group__qspipsu__api.html#gad4bd22b7d06c85885fafdae994e1c86a">XQSPIPSU_MSG_FLAG_POLL</a>, <a class="el" href="group__qspipsu__api.html#gacdde904168f5899e4ba6ccd59c360849">XQSPIPSU_MSG_FLAG_RX</a>, <a class="el" href="group__qspipsu__api.html#gae55fa60e803534f990c0493b67eb02f1">XQspiPsu_PollDataConfig()</a>, <a class="el" href="group__qspipsu__api.html#ga6e5ef224ee243dc64228ad60155a3f8b">XQSPIPSU_READMODE_DMA</a>, and <a class="el" href="group__qspipsu.html#ga584ee0482b95d3f49353438ca58fb180">XQspiPsu_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a4f09bf044ed26b11fc5489cb7b7ca1e6">BulkErase()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a97d8ab88e6002a97c30b95b66db231ea">DieErase()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a83a78784f5ba39b5e76b17a7e4a5ecad">FlashEnableQuadMode()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#ae8d1767607b58391ccb2d0103c2fd456">FlashEnterExit4BAddMode()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a8c7c38172a5258ee7cdfaef5a1a9af82">FlashErase()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#aaaad34739d0ad6d1fb5436c1d6428463">FlashRead()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#ac7c0194bd58d158581c699b8c07c309d">FlashReadID()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a333c8e44e9af52811dee98f2cfcacf53">FlashWrite()</a>, and <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#aa6007218826af36e0df62b747de40de5">MultiDieRead()</a>.</p>

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          <td class="memname">void XQspiPsu_IntrDataTransfer </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32 *&#160;</td>
          <td class="paramname"><em>QspiPsuStatusReg</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8 *&#160;</td>
          <td class="paramname"><em>DeltaMsgCnt</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Transfers Tx and Rx data. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance. </td></tr>
    <tr><td class="paramname">QspiPsuStatusReg</td><td>Status of QSPI status register. </td></tr>
    <tr><td class="paramname">DeltaMsgCnt</td><td>Message count flag.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___config.html#a4048264c3ac6b3455c0295eeacac874b">XQspiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="struct_x_qspi_psu___msg.html#a2c11ea724a05dd7d68b8e4adcb7ac46e">XQspiPsu_Msg::Flags</a>, <a class="el" href="struct_x_qspi_psu.html#a29f89d26e8b2046a17065912e1a7b365">XQspiPsu::Msg</a>, <a class="el" href="struct_x_qspi_psu.html#ad39fab4f939983f961777ae33212f14c">XQspiPsu::MsgCnt</a>, <a class="el" href="struct_x_qspi_psu.html#af6710ef68edf3ff0a833c088207ba227">XQspiPsu::NumMsg</a>, <a class="el" href="struct_x_qspi_psu.html#abcf49b02b0b90a7eecf9fb5ba40ac0b3">XQspiPsu::ReadMode</a>, <a class="el" href="struct_x_qspi_psu.html#a2ebf04ce847da29d6069795db26fbccc">XQspiPsu::StatusHandler</a>, <a class="el" href="struct_x_qspi_psu.html#aaf2ea17aa1aae667ccc6190222e218f7">XQspiPsu::StatusRef</a>, <a class="el" href="group__qspipsu__api.html#ga872f5fe8dbac27ca8867387e2185069d">XQspiPsu_IntrRecvData()</a>, <a class="el" href="group__qspipsu__api.html#gaa77c471d9c50c3671a2f2a7c28707f4d">XQspiPsu_IntrSendData()</a>, <a class="el" href="group__qspipsu.html#gadae24d033fb12577e3e4eda5427a950a">XQSPIPSU_ISR_OFFSET</a>, <a class="el" href="group__qspipsu__api.html#gacdde904168f5899e4ba6ccd59c360849">XQSPIPSU_MSG_FLAG_RX</a>, <a class="el" href="group__qspipsu__api.html#gae82f60c2162c93b8e302125914d8aab6">XQSPIPSU_MSG_FLAG_TX</a>, <a class="el" href="group__qspipsu__api.html#ga6e5ef224ee243dc64228ad60155a3f8b">XQSPIPSU_READMODE_DMA</a>, <a class="el" href="group__qspipsu.html#gab88bcdb0f53b21b79cd0805cfd14cb89">XQspiPsu_ReadReg</a>, and <a class="el" href="group__qspipsu.html#ga584ee0482b95d3f49353438ca58fb180">XQspiPsu_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#gaa345ea3ab3694a94a60e6217cb8d5e59">XQspiPsu_InterruptHandler()</a>.</p>

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          <td class="memname">void XQspiPsu_IntrDummyDataTransfer </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>QspiPsuStatusReg</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>DeltaMsgCnt</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Transfers Dummy byte. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance. </td></tr>
    <tr><td class="paramname">QspiPsuStatusReg</td><td>Status of QSPI status register. </td></tr>
    <tr><td class="paramname">DeltaMsgCnt</td><td>Message count flag.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___config.html#a4048264c3ac6b3455c0295eeacac874b">XQspiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="struct_x_qspi_psu.html#ad253a7c807935d5b3178966e74f6821c">XQspiPsu::IsBusy</a>, <a class="el" href="struct_x_qspi_psu.html#a1e1d64fc74cfc2442eedaf0eb3f97263">XQspiPsu::IsUnaligned</a>, <a class="el" href="struct_x_qspi_psu.html#a29f89d26e8b2046a17065912e1a7b365">XQspiPsu::Msg</a>, <a class="el" href="struct_x_qspi_psu.html#ad39fab4f939983f961777ae33212f14c">XQspiPsu::MsgCnt</a>, <a class="el" href="struct_x_qspi_psu.html#af6710ef68edf3ff0a833c088207ba227">XQspiPsu::NumMsg</a>, <a class="el" href="struct_x_qspi_psu.html#abcf49b02b0b90a7eecf9fb5ba40ac0b3">XQspiPsu::ReadMode</a>, <a class="el" href="struct_x_qspi_psu.html#a2ebf04ce847da29d6069795db26fbccc">XQspiPsu::StatusHandler</a>, <a class="el" href="struct_x_qspi_psu.html#aaf2ea17aa1aae667ccc6190222e218f7">XQspiPsu::StatusRef</a>, <a class="el" href="group__qspipsu.html#ga1d76a2f706f3988da79345132e484303">XQSPIPSU_CFG_OFFSET</a>, <a class="el" href="group__qspipsu__api.html#ga08036c2fa8996e246d9d529fd2302af9">XQspiPsu_GenFifoEntryData()</a>, <a class="el" href="group__qspipsu.html#ga5eb684785dfb0a249b18126089624b91">XQSPIPSU_IDR_OFFSET</a>, <a class="el" href="group__qspipsu__api.html#ga6e5ef224ee243dc64228ad60155a3f8b">XQSPIPSU_READMODE_DMA</a>, <a class="el" href="group__qspipsu.html#gab88bcdb0f53b21b79cd0805cfd14cb89">XQspiPsu_ReadReg</a>, and <a class="el" href="group__qspipsu.html#ga584ee0482b95d3f49353438ca58fb180">XQspiPsu_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#gaa345ea3ab3694a94a60e6217cb8d5e59">XQspiPsu_InterruptHandler()</a>.</p>

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          <td class="memname">void XQspiPsu_IntrRecvData </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>QspiPsuStatusReg</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>DmaIntrStatusReg</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8 *&#160;</td>
          <td class="paramname"><em>DeltaMsgCnt</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Performs a transfer of Rx data on the busin interrupt mode. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance. </td></tr>
    <tr><td class="paramname">QspiPsuStatusReg</td><td>Status QSPI status register. </td></tr>
    <tr><td class="paramname">DmaIntrStatusReg</td><td>Status DMA interrupt register. </td></tr>
    <tr><td class="paramname">DeltaMsgCnt</td><td>Message count flag.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="struct_x_qspi_psu___config.html#a400769b796e581c883c34c63320c51b3">XQspiPsu_Config::IsCacheCoherent</a>, <a class="el" href="struct_x_qspi_psu.html#a29f89d26e8b2046a17065912e1a7b365">XQspiPsu::Msg</a>, <a class="el" href="struct_x_qspi_psu.html#ad39fab4f939983f961777ae33212f14c">XQspiPsu::MsgCnt</a>, <a class="el" href="struct_x_qspi_psu.html#abcf49b02b0b90a7eecf9fb5ba40ac0b3">XQspiPsu::ReadMode</a>, <a class="el" href="struct_x_qspi_psu.html#ac45ddbc82ca891a58fbc9f25150fce30">XQspiPsu::RxBytes</a>, <a class="el" href="group__qspipsu__api.html#ga08036c2fa8996e246d9d529fd2302af9">XQspiPsu_GenFifoEntryData()</a>, <a class="el" href="group__qspipsu__api.html#gae7900ea73e245de8f091d4d4c201fe76">XQspiPsu_IORead()</a>, <a class="el" href="group__qspipsu__api.html#ga6e5ef224ee243dc64228ad60155a3f8b">XQSPIPSU_READMODE_DMA</a>, <a class="el" href="group__qspipsu__api.html#gad6a88bdae8e13bd8cd48bb9e6d565610">XQSPIPSU_RXADDR_OVER_32BIT</a>, and <a class="el" href="group__qspipsu__api.html#ga02f2ea05785dff6887625c5ef088a73b">XQspiPsu_SetIOMode()</a>.</p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#gaf5cca9a4c8ba075e4d9855a789cecc40">XQspiPsu_IntrDataTransfer()</a>.</p>

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          <td class="memname">void XQspiPsu_IntrSendData </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>QspiPsuStatusReg</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8 *&#160;</td>
          <td class="paramname"><em>DeltaMsgCnt</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Performs a transfer of Tx data on the bus in interrupt mode. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance. </td></tr>
    <tr><td class="paramname">QspiPsuStatusReg</td><td>Status QSPI status register. </td></tr>
    <tr><td class="paramname">DeltaMsgCnt</td><td>Message count flag.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___msg.html#a2c11ea724a05dd7d68b8e4adcb7ac46e">XQspiPsu_Msg::Flags</a>, <a class="el" href="struct_x_qspi_psu.html#a29f89d26e8b2046a17065912e1a7b365">XQspiPsu::Msg</a>, <a class="el" href="struct_x_qspi_psu.html#ad39fab4f939983f961777ae33212f14c">XQspiPsu::MsgCnt</a>, <a class="el" href="struct_x_qspi_psu.html#a489eab59d93d119fe5776f8d440ec2bd">XQspiPsu::TxBytes</a>, <a class="el" href="group__qspipsu__api.html#gaf5c0853d67052b9b05af03946e51c4c2">XQspiPsu_FillTxFifo()</a>, and <a class="el" href="group__qspipsu__api.html#gacdde904168f5899e4ba6ccd59c360849">XQSPIPSU_MSG_FLAG_RX</a>.</p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#gaf5cca9a4c8ba075e4d9855a789cecc40">XQspiPsu_IntrDataTransfer()</a>.</p>

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          <td class="memname">void XQspiPsu_IORead </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *&#160;</td>
          <td class="paramname"><em>Msg</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>StatusReg</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Reads data from RXFifo in I/O mode. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance. </td></tr>
    <tr><td class="paramname">Msg</td><td>Pointer to the structure containing transfer data. </td></tr>
    <tr><td class="paramname">StatusReg</td><td>Interrupt status Register value.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___config.html#a4048264c3ac6b3455c0295eeacac874b">XQspiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="struct_x_qspi_psu.html#ae6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a>, <a class="el" href="struct_x_qspi_psu.html#ac45ddbc82ca891a58fbc9f25150fce30">XQspiPsu::RxBytes</a>, <a class="el" href="group__qspipsu.html#gab88bcdb0f53b21b79cd0805cfd14cb89">XQspiPsu_ReadReg</a>, and <a class="el" href="group__qspipsu__api.html#gaa04d433c594d66417be2c4f83c092203">XQspiPsu_ReadRxFifo()</a>.</p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#ga872f5fe8dbac27ca8867387e2185069d">XQspiPsu_IntrRecvData()</a>, and <a class="el" href="group__qspipsu__api.html#ga18829cabd2b37c4cf9fb2efa0632c398">XQspiPsu_PolledRecvData()</a>.</p>

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          <td class="memname"><a class="el" href="struct_x_qspi_psu___config.html">XQspiPsu_Config</a> * XQspiPsu_LookupConfig </td>
          <td>(</td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>DeviceId</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>Looks up the device configuration based on the unique device ID. </p>
<p>A table contains the configuration info for each device in the system.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">DeviceId</td><td>Contains the ID of the device to look up the configuration for.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>A pointer to the configuration found or NULL if the specified device ID was not found. See <a class="el" href="xqspipsu_8h.html">xqspipsu.h</a> for the definition of <a class="el" href="struct_x_qspi_psu___config.html" title="This typedef contains configuration information for the device. ">XQspiPsu_Config</a>.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="group__qspipsu__api.html#ga0a1440bbf114a2e065b65bca531a14c3">XQspiPsu_ConfigTable</a>.</p>

<p>Referenced by <a class="el" href="xqspipsu__generic__flash__non__blocking__read__example_8c.html#a653eb600a5672ee9c7664f2720a05258">QspiPsuFlashNonBlockingReadExample()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a1d5699f770ac9e1ceaf76398b568b9ee">QspiPsuInterruptFlashExample()</a>, <a class="el" href="xqspipsu__generic__flash__polled__64bit__dma__r5__example_8c.html#ac7a0e7a44578f580f46491eb6f6ce726">QspiPsuPolledFlashExample()</a>, and <a class="el" href="xqspipsu__write__protect__example_8c.html#a191ca904211eda1c8b5dddc5e6a16331">QspiPsuWriteProtectFlashExample()</a>.</p>

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          <td class="memname">void XQspiPsu_PollDataConfig </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *&#160;</td>
          <td class="paramname"><em>FlashMsg</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Enables the polling functionality of controller. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance.</td></tr>
    <tr><td class="paramname">FlashMsg</td><td>Pointer to the structure containing transfer data.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___config.html#a4048264c3ac6b3455c0295eeacac874b">XQspiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="struct_x_qspi_psu___msg.html#a2c11ea724a05dd7d68b8e4adcb7ac46e">XQspiPsu_Msg::Flags</a>, <a class="el" href="struct_x_qspi_psu.html#a04675183fe2c3b312d0866a2a2f9b906">XQspiPsu::GenFifoBus</a>, <a class="el" href="struct_x_qspi_psu.html#adbe5c279e1de1f98d3f63bc30cd2d2a4">XQspiPsu::GenFifoCS</a>, <a class="el" href="struct_x_qspi_psu.html#ae6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a>, <a class="el" href="struct_x_qspi_psu.html#a29f89d26e8b2046a17065912e1a7b365">XQspiPsu::Msg</a>, <a class="el" href="struct_x_qspi_psu.html#ad39fab4f939983f961777ae33212f14c">XQspiPsu::MsgCnt</a>, <a class="el" href="struct_x_qspi_psu.html#af6710ef68edf3ff0a833c088207ba227">XQspiPsu::NumMsg</a>, <a class="el" href="struct_x_qspi_psu___msg.html#a4868812107662f5c99d0ad03ef9da293">XQspiPsu_Msg::PollStatusCmd</a>, <a class="el" href="struct_x_qspi_psu___msg.html#ac06e894441ae84236cd61d98b5a322f0">XQspiPsu_Msg::PollTimeout</a>, <a class="el" href="group__qspipsu.html#ga1d76a2f706f3988da79345132e484303">XQSPIPSU_CFG_OFFSET</a>, <a class="el" href="group__qspipsu__api.html#ga6f3b7fc81ae5c50ee3ea373d80b4b542">XQspiPsu_CreatePollDataConfig()</a>, <a class="el" href="group__qspipsu.html#ga3bfe2023b6a6ce56e9d13f130bd1c86d">XQSPIPSU_GEN_FIFO_OFFSET</a>, <a class="el" href="group__qspipsu.html#gab8e3a4621239cb556fc8acdd0a6d10b6">XQSPIPSU_IER_OFFSET</a>, <a class="el" href="group__qspipsu__api.html#ga767a4572b5fe31cd9ff390c44d25e968">XQSPIPSU_MSG_FLAG_STRIPE</a>, <a class="el" href="group__qspipsu.html#gaf657fc3a38e22e512c0f7cf03bda1ad7">XQSPIPSU_POLL_CFG_OFFSET</a>, <a class="el" href="group__qspipsu.html#gab88bcdb0f53b21b79cd0805cfd14cb89">XQspiPsu_ReadReg</a>, and <a class="el" href="group__qspipsu.html#ga584ee0482b95d3f49353438ca58fb180">XQspiPsu_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#ga6ae727534cf55b878b9b1974dc72a625">XQspiPsu_InterruptTransfer()</a>.</p>

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          <td class="memname">void XQspiPsu_PollDataHandler </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>StatusReg</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This is the handler for polling functionality of controller. </p>
<p>It reads data from RXFIFO, since when data from the flash device (status data) matched with configured value in poll_cfg, then controller writes the matched data into RXFIFO.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance. </td></tr>
    <tr><td class="paramname">StatusReg</td><td>Interrupt status Register value.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___config.html#a4048264c3ac6b3455c0295eeacac874b">XQspiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="struct_x_qspi_psu.html#ad253a7c807935d5b3178966e74f6821c">XQspiPsu::IsBusy</a>, <a class="el" href="struct_x_qspi_psu.html#ae6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a>, <a class="el" href="struct_x_qspi_psu.html#abcf49b02b0b90a7eecf9fb5ba40ac0b3">XQspiPsu::ReadMode</a>, <a class="el" href="struct_x_qspi_psu.html#a2ebf04ce847da29d6069795db26fbccc">XQspiPsu::StatusHandler</a>, <a class="el" href="struct_x_qspi_psu.html#aaf2ea17aa1aae667ccc6190222e218f7">XQspiPsu::StatusRef</a>, <a class="el" href="group__qspipsu.html#ga5eb684785dfb0a249b18126089624b91">XQSPIPSU_IDR_OFFSET</a>, <a class="el" href="group__qspipsu__api.html#ga6e5ef224ee243dc64228ad60155a3f8b">XQSPIPSU_READMODE_DMA</a>, <a class="el" href="group__qspipsu.html#gab88bcdb0f53b21b79cd0805cfd14cb89">XQspiPsu_ReadReg</a>, <a class="el" href="group__qspipsu.html#ga68b0b4316693414546980dea7baaf0a4">XQSPIPSU_RXD_OFFSET</a>, <a class="el" href="group__qspipsu__api.html#ga3a37a08570be55ea07945a18a80306f3">XQspiPsu_SetReadMode()</a>, and <a class="el" href="group__qspipsu.html#ga584ee0482b95d3f49353438ca58fb180">XQspiPsu_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#gaa345ea3ab3694a94a60e6217cb8d5e59">XQspiPsu_InterruptHandler()</a>.</p>

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          <td class="memname">s32 XQspiPsu_PolledMessageTransfer </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *&#160;</td>
          <td class="paramname"><em>Msg</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>NumMsg</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Performs a transfer on the bus in polled mode. </p>
<p>The messages passed are all transferred on the bus between one CS assert and de-assert.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance. </td></tr>
    <tr><td class="paramname">Msg</td><td>Pointer to the structure containing transfer data. </td></tr>
    <tr><td class="paramname">NumMsg</td><td>Number of messages to be transferred.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if successful.</li>
<li>XST_FAILURE if transfer fails. </li>
</ul>
</dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___config.html#a4048264c3ac6b3455c0295eeacac874b">XQspiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="struct_x_qspi_psu.html#a1e1d64fc74cfc2442eedaf0eb3f97263">XQspiPsu::IsUnaligned</a>, <a class="el" href="struct_x_qspi_psu.html#abcf49b02b0b90a7eecf9fb5ba40ac0b3">XQspiPsu::ReadMode</a>, <a class="el" href="struct_x_qspi_psu.html#ac45ddbc82ca891a58fbc9f25150fce30">XQspiPsu::RxBytes</a>, <a class="el" href="struct_x_qspi_psu.html#a489eab59d93d119fe5776f8d440ec2bd">XQspiPsu::TxBytes</a>, <a class="el" href="group__qspipsu.html#ga1d76a2f706f3988da79345132e484303">XQSPIPSU_CFG_OFFSET</a>, <a class="el" href="group__qspipsu__api.html#ga08036c2fa8996e246d9d529fd2302af9">XQspiPsu_GenFifoEntryData()</a>, <a class="el" href="group__qspipsu.html#gadae24d033fb12577e3e4eda5427a950a">XQSPIPSU_ISR_OFFSET</a>, <a class="el" href="group__qspipsu__api.html#gacdde904168f5899e4ba6ccd59c360849">XQSPIPSU_MSG_FLAG_RX</a>, <a class="el" href="group__qspipsu__api.html#gae82f60c2162c93b8e302125914d8aab6">XQSPIPSU_MSG_FLAG_TX</a>, <a class="el" href="group__qspipsu__api.html#ga18829cabd2b37c4cf9fb2efa0632c398">XQspiPsu_PolledRecvData()</a>, <a class="el" href="group__qspipsu__api.html#gad8adcb1fd07106bb0add26e24a4c0084">XQspiPsu_PolledSendData()</a>, <a class="el" href="group__qspipsu__api.html#ga6e5ef224ee243dc64228ad60155a3f8b">XQSPIPSU_READMODE_DMA</a>, <a class="el" href="group__qspipsu.html#gab88bcdb0f53b21b79cd0805cfd14cb89">XQspiPsu_ReadReg</a>, and <a class="el" href="group__qspipsu.html#ga584ee0482b95d3f49353438ca58fb180">XQspiPsu_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#ga61de390e2bc4af0ce77448a46763ea39">XQspiPsu_PolledTransfer()</a>.</p>

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          <td class="memname">s32 XQspiPsu_PolledRecvData </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *&#160;</td>
          <td class="paramname"><em>Msg</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">s32&#160;</td>
          <td class="paramname"><em>Index</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32 *&#160;</td>
          <td class="paramname"><em>IOPending</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Transfers Rx data on the bus in polled mode. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance. </td></tr>
    <tr><td class="paramname">Msg</td><td>Pointer to the structure containing transfer data. </td></tr>
    <tr><td class="paramname">Index</td><td>Msg index to transfer. </td></tr>
    <tr><td class="paramname">IOPending</td><td>I/O mode transfer status.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if successful.</li>
<li>XST_FAILURE if transfer fails. </li>
</ul>
</dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___config.html#a4048264c3ac6b3455c0295eeacac874b">XQspiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="struct_x_qspi_psu___config.html#a400769b796e581c883c34c63320c51b3">XQspiPsu_Config::IsCacheCoherent</a>, <a class="el" href="group__qspipsu__api.html#ga02055aef4b0f9a801005ebdc7b556157">MAX_DELAY_CNT</a>, <a class="el" href="struct_x_qspi_psu.html#abcf49b02b0b90a7eecf9fb5ba40ac0b3">XQspiPsu::ReadMode</a>, <a class="el" href="struct_x_qspi_psu.html#ac45ddbc82ca891a58fbc9f25150fce30">XQspiPsu::RxBytes</a>, <a class="el" href="group__qspipsu__api.html#gae7900ea73e245de8f091d4d4c201fe76">XQspiPsu_IORead()</a>, <a class="el" href="group__qspipsu.html#gadae24d033fb12577e3e4eda5427a950a">XQSPIPSU_ISR_OFFSET</a>, <a class="el" href="group__qspipsu__api.html#ga6e5ef224ee243dc64228ad60155a3f8b">XQSPIPSU_READMODE_DMA</a>, <a class="el" href="group__qspipsu.html#gab88bcdb0f53b21b79cd0805cfd14cb89">XQspiPsu_ReadReg</a>, <a class="el" href="group__qspipsu__api.html#gad6a88bdae8e13bd8cd48bb9e6d565610">XQSPIPSU_RXADDR_OVER_32BIT</a>, <a class="el" href="group__qspipsu__api.html#ga02f2ea05785dff6887625c5ef088a73b">XQspiPsu_SetIOMode()</a>, and <a class="el" href="group__qspipsu.html#ga584ee0482b95d3f49353438ca58fb180">XQspiPsu_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#ga83a88b04245b12857557e1d443cd3689">XQspiPsu_PolledMessageTransfer()</a>.</p>

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          <td class="memname">s32 XQspiPsu_PolledSendData </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *&#160;</td>
          <td class="paramname"><em>Msg</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">s32&#160;</td>
          <td class="paramname"><em>Index</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Transfers Tx data on the bus in polled mode. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance. </td></tr>
    <tr><td class="paramname">Msg</td><td>Pointer to the structure containing transfer data. </td></tr>
    <tr><td class="paramname">Index</td><td>Msg index to transfer.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if successful.</li>
<li>XST_FAILURE if transfer fails. </li>
</ul>
</dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___config.html#a4048264c3ac6b3455c0295eeacac874b">XQspiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="group__qspipsu__api.html#ga02055aef4b0f9a801005ebdc7b556157">MAX_DELAY_CNT</a>, <a class="el" href="struct_x_qspi_psu.html#a489eab59d93d119fe5776f8d440ec2bd">XQspiPsu::TxBytes</a>, <a class="el" href="group__qspipsu__api.html#gaf5c0853d67052b9b05af03946e51c4c2">XQspiPsu_FillTxFifo()</a>, and <a class="el" href="group__qspipsu.html#gadae24d033fb12577e3e4eda5427a950a">XQSPIPSU_ISR_OFFSET</a>.</p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#ga83a88b04245b12857557e1d443cd3689">XQspiPsu_PolledMessageTransfer()</a>.</p>

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          <td class="memname">s32 XQspiPsu_PolledTransfer </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *&#160;</td>
          <td class="paramname"><em>Msg</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>NumMsg</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Performs a transfer on the bus in polled mode. </p>
<p>The messages passed are all transferred on the bus between one CS assert and de-assert.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance. </td></tr>
    <tr><td class="paramname">Msg</td><td>Pointer to the structure containing transfer data. </td></tr>
    <tr><td class="paramname">NumMsg</td><td>Number of messages to be transferred.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if successful.</li>
<li>XST_FAILURE if transfer fails.</li>
<li>XST_DEVICE_BUSY if a transfer is already in progress.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___config.html#a4048264c3ac6b3455c0295eeacac874b">XQspiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="struct_x_qspi_psu___msg.html#a2c11ea724a05dd7d68b8e4adcb7ac46e">XQspiPsu_Msg::Flags</a>, <a class="el" href="struct_x_qspi_psu.html#ad253a7c807935d5b3178966e74f6821c">XQspiPsu::IsBusy</a>, <a class="el" href="struct_x_qspi_psu.html#ae6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a>, <a class="el" href="group__qspipsu__api.html#ga02055aef4b0f9a801005ebdc7b556157">MAX_DELAY_CNT</a>, <a class="el" href="group__qspipsu__api.html#gafa633d08d4bcacadc20f2696665edb75">XQSPIPSU_DMA_BYTES_MAX</a>, <a class="el" href="group__qspipsu.html#gadae24d033fb12577e3e4eda5427a950a">XQSPIPSU_ISR_OFFSET</a>, <a class="el" href="group__qspipsu__api.html#gacdde904168f5899e4ba6ccd59c360849">XQSPIPSU_MSG_FLAG_RX</a>, and <a class="el" href="group__qspipsu__api.html#ga83a88b04245b12857557e1d443cd3689">XQspiPsu_PolledMessageTransfer()</a>.</p>

<p>Referenced by <a class="el" href="xqspipsu__generic__flash__non__blocking__read__example_8c.html#a5e40a81a572bfacbf4d7a39af7905cea">FlashRegisterRead()</a>, and <a class="el" href="xqspipsu__generic__flash__non__blocking__read__example_8c.html#a5b70ac0045f51c4babd8709e1c030752">FlashRegisterWrite()</a>.</p>

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          <td class="memname">void XQspiPsu_ReadRxFifo </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *&#160;</td>
          <td class="paramname"><em>Msg</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">s32&#160;</td>
          <td class="paramname"><em>Size</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
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<p>Reads the specified number of bytes from RX FIFO. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance. </td></tr>
    <tr><td class="paramname">Msg</td><td>Pointer to the structure containing transfer data. </td></tr>
    <tr><td class="paramname">Size</td><td>Number of bytes to be read.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___config.html#a4048264c3ac6b3455c0295eeacac874b">XQspiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="struct_x_qspi_psu.html#ae6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a>, <a class="el" href="struct_x_qspi_psu___msg.html#a1fb697c64fd14580822f4baf50f26df1">XQspiPsu_Msg::RxBfrPtr</a>, <a class="el" href="struct_x_qspi_psu.html#ac45ddbc82ca891a58fbc9f25150fce30">XQspiPsu::RxBytes</a>, <a class="el" href="group__qspipsu.html#gab88bcdb0f53b21b79cd0805cfd14cb89">XQspiPsu_ReadReg</a>, and <a class="el" href="group__qspipsu.html#ga68b0b4316693414546980dea7baaf0a4">XQSPIPSU_RXD_OFFSET</a>.</p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#gae7900ea73e245de8f091d4d4c201fe76">XQspiPsu_IORead()</a>.</p>

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          <td class="memname">void XQspiPsu_Reset </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Resets the QSPIPSU device. </p>
<p>Reset must only be called after the driver has been initialized. Any data transfer that is in progress is aborted.</p>
<p>The upper layer software is responsible for re-configuring (if necessary) and restarting the QSPIPSU device after the reset.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="group__qspipsu__api.html#gaaa69ec6da90deb760954ea3dcfd55d7f">XQspiPsu_Abort()</a>, and <a class="el" href="group__qspipsu__api.html#gae720bdee9a521b160e1e364053b66b61">XQspiPsu_SetDefaultConfig()</a>.</p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#ga803eccd67d1dfde416b54488865c1e9d">XQspiPsu_CfgInitialize()</a>.</p>

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          <td class="memname">void XQspiPsu_RXSetup </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *&#160;</td>
          <td class="paramname"><em>Msg</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Checks the RX buffers in the message and setup the RX DMA as required. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance. </td></tr>
    <tr><td class="paramname">Msg</td><td>Pointer to the structure containing transfer data.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___msg.html#a420a0720c6eb8d77aae09c829185b160">XQspiPsu_Msg::ByteCount</a>, <a class="el" href="struct_x_qspi_psu.html#ae6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a>, <a class="el" href="struct_x_qspi_psu.html#abcf49b02b0b90a7eecf9fb5ba40ac0b3">XQspiPsu::ReadMode</a>, <a class="el" href="struct_x_qspi_psu___msg.html#a95b9e43bb920ea5055db6b1971d7f780">XQspiPsu_Msg::RxAddr64bit</a>, <a class="el" href="struct_x_qspi_psu.html#ac45ddbc82ca891a58fbc9f25150fce30">XQspiPsu::RxBytes</a>, <a class="el" href="struct_x_qspi_psu___msg.html#ac9a904e6a2fa8d5668e554615a59bbb5">XQspiPsu_Msg::Xfer64bit</a>, <a class="el" href="group__qspipsu__api.html#ga6e5ef224ee243dc64228ad60155a3f8b">XQSPIPSU_READMODE_DMA</a>, <a class="el" href="group__qspipsu__api.html#gad6a88bdae8e13bd8cd48bb9e6d565610">XQSPIPSU_RXADDR_OVER_32BIT</a>, <a class="el" href="group__qspipsu__api.html#ga03fb04c8187cf51d256a9196430c6224">XQspiPsu_Setup64BRxDma()</a>, and <a class="el" href="group__qspipsu__api.html#ga0467a9580fe9018adfd4302fbd91e404">XQspiPsu_SetupRxDma()</a>.</p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#ga8b201a022bb63afbaaf9afad23064761">XQspiPsu_TXRXSetup()</a>.</p>

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          <td class="memname">void XQspiPsu_SelectFlash </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>FlashCS</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>FlashBus</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Used to tell the QSPIPSU driver the hardware flash configuration being used. </p>
<p>This API should be called at least once in the application. If desired, it can be called multiple times when switching between communicating to different flahs devices/using different configs.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance. </td></tr>
    <tr><td class="paramname">FlashCS</td><td>Flash Chip Select. </td></tr>
    <tr><td class="paramname">FlashBus</td><td>Flash Bus (Upper, Lower or Both).</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if successful.</li>
<li>XST_DEVICE_IS_STARTED if the device is already started. It must be stopped to re-initialize.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>If this function is not called at least once in the application, the driver assumes there is a single flash connected to the lower bus and CS line. </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu.html#a04675183fe2c3b312d0866a2a2f9b906">XQspiPsu::GenFifoBus</a>, <a class="el" href="struct_x_qspi_psu.html#adbe5c279e1de1f98d3f63bc30cd2d2a4">XQspiPsu::GenFifoCS</a>, <a class="el" href="struct_x_qspi_psu.html#ae6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a>, <a class="el" href="group__qspipsu__api.html#ga5d8490a76bf6be3a4655e3fa8e90a19f">XQSPIPSU_SELECT_FLASH_BUS_BOTH</a>, <a class="el" href="group__qspipsu__api.html#ga2d896ad5edf8b15e6dbd4d7a87517a35">XQSPIPSU_SELECT_FLASH_BUS_LOWER</a>, <a class="el" href="group__qspipsu__api.html#ga9eeab1d9cd47c4a0281d9188d3072444">XQSPIPSU_SELECT_FLASH_BUS_UPPER</a>, <a class="el" href="group__qspipsu__api.html#gab8fb3a2887dbf0331cc9057afea0ec53">XQSPIPSU_SELECT_FLASH_CS_BOTH</a>, <a class="el" href="group__qspipsu__api.html#ga4c5dd4c0387f6ae12a78b86c653bb74d">XQSPIPSU_SELECT_FLASH_CS_LOWER</a>, and <a class="el" href="group__qspipsu__api.html#ga2211df126779f654595c9663f5624ba4">XQSPIPSU_SELECT_FLASH_CS_UPPER</a>.</p>

<p>Referenced by <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a8c7c38172a5258ee7cdfaef5a1a9af82">FlashErase()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#af45c38b76bbabbaf848a33cdc889ebfb">GetRealAddr()</a>, <a class="el" href="xqspipsu__polldata__polltimeout__interrupt__example_8c.html#a90454c300a46c3a9c1ba66d2a680b63c">QspiPsuConfigurePoll()</a>, <a class="el" href="xqspipsu__generic__flash__non__blocking__read__example_8c.html#a653eb600a5672ee9c7664f2720a05258">QspiPsuFlashNonBlockingReadExample()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a1d5699f770ac9e1ceaf76398b568b9ee">QspiPsuInterruptFlashExample()</a>, <a class="el" href="xqspipsu__generic__flash__polled__64bit__dma__r5__example_8c.html#ac7a0e7a44578f580f46491eb6f6ce726">QspiPsuPolledFlashExample()</a>, and <a class="el" href="xqspipsu__write__protect__example_8c.html#a191ca904211eda1c8b5dddc5e6a16331">QspiPsuWriteProtectFlashExample()</a>.</p>

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          <td class="memname">u32 XQspiPsu_SelectSpiMode </td>
          <td>(</td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>SpiMode</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Selects SPI mode - x1 or x2 or x4. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">SpiMode</td><td>spi or dual or quad. </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Mask to set desired SPI mode in GENFIFO entry. </dd></dl>

<p>References <a class="el" href="group__qspipsu__api.html#gaa57e6e6b6efaaa981a9a81ae9db3d78a">XQSPIPSU_SELECT_MODE_DUALSPI</a>, <a class="el" href="group__qspipsu__api.html#ga6750df2d9d9169fdef76bfc957ae501c">XQSPIPSU_SELECT_MODE_QUADSPI</a>, and <a class="el" href="group__qspipsu__api.html#ga185ba58041ded76c03bb18ad69e783af">XQSPIPSU_SELECT_MODE_SPI</a>.</p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#ga08036c2fa8996e246d9d529fd2302af9">XQspiPsu_GenFifoEntryData()</a>.</p>

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          <td class="memname">s32 XQspiPsu_SetClkPrescaler </td>
          <td>(</td>
          <td class="paramtype">const <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Prescaler</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Configures the clock according to the prescaler passed. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance. </td></tr>
    <tr><td class="paramname">Prescaler</td><td>Clock prescaler to be set.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if successful.</li>
<li>XST_DEVICE_IS_STARTED if the device is already started.</li>
<li>XST_DEVICE_BUSY if the device is currently transferring data. It must be stopped to re-initialize.</li>
<li>XST_FAILURE if Prescaler value is less than FreqDiv when feedback clock is not enabled.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___config.html#a4048264c3ac6b3455c0295eeacac874b">XQspiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="struct_x_qspi_psu___config.html#a630de071c5c249ec4bf502fff7f8daaa">XQspiPsu_Config::InputClockHz</a>, <a class="el" href="struct_x_qspi_psu.html#ad253a7c807935d5b3178966e74f6821c">XQspiPsu::IsBusy</a>, <a class="el" href="struct_x_qspi_psu___config.html#ab141b30f1c3f753a9805200c580bf716">XQspiPsu_Config::IsFbClock</a>, <a class="el" href="struct_x_qspi_psu.html#ae6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a>, <a class="el" href="group__qspipsu.html#ga1d76a2f706f3988da79345132e484303">XQSPIPSU_CFG_OFFSET</a>, <a class="el" href="group__qspipsu__api.html#gae53e5d9f18e5fe950d0ce0165880bb7f">XQSPIPSU_CR_PRESC_MAXIMUM</a>, <a class="el" href="group__qspipsu__api.html#gacb92bc4c932f3cb76254d29c165422ad">XQSPIPSU_FREQ_37_5MHZ</a>, <a class="el" href="group__qspipsu.html#gab88bcdb0f53b21b79cd0805cfd14cb89">XQspiPsu_ReadReg</a>, and <a class="el" href="group__qspipsu.html#ga584ee0482b95d3f49353438ca58fb180">XQspiPsu_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xqspipsu__generic__flash__non__blocking__read__example_8c.html#a653eb600a5672ee9c7664f2720a05258">QspiPsuFlashNonBlockingReadExample()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a1d5699f770ac9e1ceaf76398b568b9ee">QspiPsuInterruptFlashExample()</a>, <a class="el" href="xqspipsu__generic__flash__polled__64bit__dma__r5__example_8c.html#ac7a0e7a44578f580f46491eb6f6ce726">QspiPsuPolledFlashExample()</a>, and <a class="el" href="xqspipsu__write__protect__example_8c.html#a191ca904211eda1c8b5dddc5e6a16331">QspiPsuWriteProtectFlashExample()</a>.</p>

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          <td class="memname">void XQspiPsu_SetDefaultConfig </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>Enables and initializes DMA Mode, set little endain, disable poll timeout, clears prescalar bits and reset thresholds. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___config.html#a4048264c3ac6b3455c0295eeacac874b">XQspiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="group__qspipsu.html#ga1d76a2f706f3988da79345132e484303">XQSPIPSU_CFG_OFFSET</a>, <a class="el" href="group__qspipsu.html#ga5a8034417fd3c9846c968679c1cad859">XQSPIPSU_GF_THRESHOLD_OFFSET</a>, <a class="el" href="group__qspipsu.html#ga4636d144794bb35424cacd6f6d49781a">XQSPIPSU_LPBK_DLY_ADJ_OFFSET</a>, <a class="el" href="group__qspipsu.html#gab88bcdb0f53b21b79cd0805cfd14cb89">XQspiPsu_ReadReg</a>, <a class="el" href="group__qspipsu.html#ga33bc760357127168b3a665f969036421">XQSPIPSU_TX_THRESHOLD_OFFSET</a>, and <a class="el" href="group__qspipsu.html#ga584ee0482b95d3f49353438ca58fb180">XQspiPsu_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#ga799b60ee7157ed46b84475677aa0dc03">XQspiPsu_Reset()</a>.</p>

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          <td class="memname">u32 XQspiPsu_SetIOMode </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *&#160;</td>
          <td class="paramname"><em>Msg</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Reads remaining bytes after the completion of a DMA transfer using I/O mode. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance. </td></tr>
    <tr><td class="paramname">Msg</td><td>Pointer to the structure containing transfer data.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if successful.</li>
<li>XST_FAILURE if transfer fails.</li>
<li>XST_DEVICE_BUSY if a transfer is already in progress.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___config.html#a4048264c3ac6b3455c0295eeacac874b">XQspiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_qspi_psu___msg.html#a420a0720c6eb8d77aae09c829185b160">XQspiPsu_Msg::ByteCount</a>, <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="struct_x_qspi_psu.html#ae6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a>, <a class="el" href="struct_x_qspi_psu.html#a1e1d64fc74cfc2442eedaf0eb3f97263">XQspiPsu::IsUnaligned</a>, <a class="el" href="struct_x_qspi_psu.html#abcf49b02b0b90a7eecf9fb5ba40ac0b3">XQspiPsu::ReadMode</a>, <a class="el" href="struct_x_qspi_psu___msg.html#a1fb697c64fd14580822f4baf50f26df1">XQspiPsu_Msg::RxBfrPtr</a>, <a class="el" href="struct_x_qspi_psu.html#ac45ddbc82ca891a58fbc9f25150fce30">XQspiPsu::RxBytes</a>, <a class="el" href="group__qspipsu.html#ga1d76a2f706f3988da79345132e484303">XQSPIPSU_CFG_OFFSET</a>, <a class="el" href="group__qspipsu__api.html#gafd11c8b8f44530c3670d2ac7497fb2fc">XQSPIPSU_READMODE_IO</a>, <a class="el" href="group__qspipsu.html#gab88bcdb0f53b21b79cd0805cfd14cb89">XQspiPsu_ReadReg</a>, and <a class="el" href="group__qspipsu.html#ga584ee0482b95d3f49353438ca58fb180">XQspiPsu_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#ga872f5fe8dbac27ca8867387e2185069d">XQspiPsu_IntrRecvData()</a>, and <a class="el" href="group__qspipsu__api.html#ga18829cabd2b37c4cf9fb2efa0632c398">XQspiPsu_PolledRecvData()</a>.</p>

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          <td class="memname">s32 XQspiPsu_SetOptions </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Options</em>&#160;</td>
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<p>Sets the options for the QSPIPSU device driver.The options control how the device behaves relative to the QSPIPSU bus. </p>
<p>The device must be idle rather than busy transferring data before setting these device options.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance. </td></tr>
    <tr><td class="paramname">Options</td><td>Contains the specified options to be set. This is a bit mask where a 1 indicates the option should be turned ON and a 0 indicates no action. One or more bit values may be contained in the mask. See the bit definitions named XQSPIPSU_*_OPTIONS in the file <a class="el" href="xqspipsu_8h.html">xqspipsu.h</a>.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if options are successfully set.</li>
<li>XST_DEVICE_BUSY if the device is currently transferring data. The transfer must complete or be aborted before setting options.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>This function is not thread-safe. </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___config.html#a4048264c3ac6b3455c0295eeacac874b">XQspiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="struct_x_qspi_psu.html#ad253a7c807935d5b3178966e74f6821c">XQspiPsu::IsBusy</a>, <a class="el" href="struct_x_qspi_psu.html#a159f22a8fb11877c4b4b2888d8153fd2">XQspiPsu::IsManualstart</a>, <a class="el" href="struct_x_qspi_psu.html#ae6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a>, <a class="el" href="group__qspipsu.html#ga49734e127e6359b15c1ce7f117748c36">XQSPIPS_BASEADDR</a>, <a class="el" href="group__qspipsu.html#ga3c05a7421b8aea31df3d026189282cce">XQSPIPS_LQSPI_CFG_RST_STATE</a>, <a class="el" href="group__qspipsu.html#ga2b4818a62cb0d5671e7dee6130165b09">XQSPIPS_LQSPI_CR_4_BYTE_STATE</a>, <a class="el" href="group__qspipsu.html#ga6f187c067994aa193d43051cb5fef0db">XQSPIPS_LQSPI_CR_RST_STATE</a>, <a class="el" href="group__qspipsu.html#ga1d76a2f706f3988da79345132e484303">XQSPIPSU_CFG_OFFSET</a>, <a class="el" href="group__qspipsu.html#ga5b7b95790bfeb5bfb3dfd63e4a5e76cc">XQSPIPSU_EN_OFFSET</a>, <a class="el" href="group__qspipsu.html#gac5bfff58ddca187becec7c533cf355fe">XQSPIPSU_LQSPI_CR_LINEAR_MASK</a>, <a class="el" href="group__qspipsu.html#ga02a2df38913ec3616e70351637cbbb50">XQSPIPSU_LQSPI_CR_OFFSET</a>, <a class="el" href="group__qspipsu__api.html#ga9e5fb7239c5d7fbadc688e29c3fb087d">XQSPIPSU_LQSPI_LESS_THEN_SIXTEENMB</a>, <a class="el" href="group__qspipsu__api.html#gaf4dde3aacf0091e9d1748b1b915648a0">XQSPIPSU_LQSPI_MODE_OPTION</a>, <a class="el" href="group__qspipsu__api.html#ga47c246bab4c5d4f6c8ff84e44049adc9">XQSPIPSU_MANUAL_START_OPTION</a>, <a class="el" href="group__qspipsu__api.html#ga7270573aac2e897d40123dcb0a181aac">XQSPIPSU_NUM_OPTIONS</a>, <a class="el" href="group__qspipsu.html#gab88bcdb0f53b21b79cd0805cfd14cb89">XQspiPsu_ReadReg</a>, and <a class="el" href="group__qspipsu.html#ga584ee0482b95d3f49353438ca58fb180">XQspiPsu_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xqspipsu__generic__flash__non__blocking__read__example_8c.html#a653eb600a5672ee9c7664f2720a05258">QspiPsuFlashNonBlockingReadExample()</a>, <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a1d5699f770ac9e1ceaf76398b568b9ee">QspiPsuInterruptFlashExample()</a>, <a class="el" href="xqspipsu__generic__flash__polled__64bit__dma__r5__example_8c.html#ac7a0e7a44578f580f46491eb6f6ce726">QspiPsuPolledFlashExample()</a>, and <a class="el" href="xqspipsu__write__protect__example_8c.html#a191ca904211eda1c8b5dddc5e6a16331">QspiPsuWriteProtectFlashExample()</a>.</p>

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          <td class="memname">s32 XQspiPsu_SetReadMode </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Mode</em>&#160;</td>
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          <td></td>
          <td>)</td>
          <td></td><td></td>
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<p>Sets the Read mode for the QSPIPSU device driver. </p>
<p>The device must be idle rather than busy transferring data before setting Read mode options.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance. </td></tr>
    <tr><td class="paramname">Mode</td><td>Contains the specified Mode to be set. See the bit definitions named XQSPIPSU_READMODE_* in the file <a class="el" href="xqspipsu_8h.html">xqspipsu.h</a>.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if options are successfully set.</li>
<li>XST_DEVICE_BUSY if the device is currently transferring data. The transfer must complete or be aborted before setting Mode.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>This function is not thread-safe. </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___config.html#a4048264c3ac6b3455c0295eeacac874b">XQspiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="struct_x_qspi_psu.html#ad253a7c807935d5b3178966e74f6821c">XQspiPsu::IsBusy</a>, <a class="el" href="struct_x_qspi_psu.html#ae6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a>, <a class="el" href="struct_x_qspi_psu.html#abcf49b02b0b90a7eecf9fb5ba40ac0b3">XQspiPsu::ReadMode</a>, <a class="el" href="group__qspipsu.html#ga1d76a2f706f3988da79345132e484303">XQSPIPSU_CFG_OFFSET</a>, <a class="el" href="group__qspipsu__api.html#ga6e5ef224ee243dc64228ad60155a3f8b">XQSPIPSU_READMODE_DMA</a>, <a class="el" href="group__qspipsu__api.html#gafd11c8b8f44530c3670d2ac7497fb2fc">XQSPIPSU_READMODE_IO</a>, <a class="el" href="group__qspipsu.html#gab88bcdb0f53b21b79cd0805cfd14cb89">XQspiPsu_ReadReg</a>, and <a class="el" href="group__qspipsu.html#ga584ee0482b95d3f49353438ca58fb180">XQspiPsu_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#ga5f083afb4ec79c542a7c7098a519d771">XQspiPsu_PollDataHandler()</a>.</p>

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          <td class="memname">void XQspiPsu_SetStatusHandler </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>CallBackRef</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__qspipsu__api.html#ga4fcad0707fd0557232bc94a8c3ba1fea">XQspiPsu_StatusHandler</a>&#160;</td>
          <td class="paramname"><em>FuncPointer</em>&#160;</td>
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          <td>)</td>
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<p>Sets the status callback function, the status handler, which the driver calls when it encounters conditions that should be reported to upper layer software. </p>
<p>The handler executes in an interrupt context, so it must minimize the amount of processing performed. One of the following status events is passed to the status handler.</p>
<pre></pre><pre>XST_SPI_TRANSFER_DONE           The requested data transfer is done</pre><pre>XST_SPI_TRANSMIT_UNDERRUN       As a slave device, the master clocked data
                        but there were none available in the transmit
                        register/FIFO. This typically means the slave
                        application did not issue a transfer request
                        fast enough, or the processor/driver could not
                        fill the transmit register/FIFO fast enough.</pre><pre>XST_SPI_RECEIVE_OVERRUN The QSPIPSU device lost data. Data was received
                        but the receive data register/FIFO was full.</pre><pre></pre> <dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance. </td></tr>
    <tr><td class="paramname">CallBackRef</td><td>Upper layer callback reference passed back when the callback function is invoked. </td></tr>
    <tr><td class="paramname">FuncPointer</td><td>Pointer to the callback function.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd></dd></dl>
<p>The handler is called within interrupt context, so it should do its work quickly and queue potentially time-consuming work to a task-level thread. </p>

<p>References <a class="el" href="struct_x_qspi_psu.html#ae6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a>, <a class="el" href="struct_x_qspi_psu.html#a2ebf04ce847da29d6069795db26fbccc">XQspiPsu::StatusHandler</a>, and <a class="el" href="struct_x_qspi_psu.html#aaf2ea17aa1aae667ccc6190222e218f7">XQspiPsu::StatusRef</a>.</p>

<p>Referenced by <a class="el" href="xqspipsu__generic__flash__interrupt__example_8c.html#a1d5699f770ac9e1ceaf76398b568b9ee">QspiPsuInterruptFlashExample()</a>, and <a class="el" href="xqspipsu__write__protect__example_8c.html#a191ca904211eda1c8b5dddc5e6a16331">QspiPsuWriteProtectFlashExample()</a>.</p>

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          <td class="memname">void XQspiPsu_Setup64BRxDma </td>
          <td>(</td>
          <td class="paramtype">const <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *&#160;</td>
          <td class="paramname"><em>Msg</em>&#160;</td>
        </tr>
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          <td></td>
          <td>)</td>
          <td></td><td></td>
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<p>Sets up the RX DMA operation on a 32-bit Machine For 64-bit DMA transfers. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance. </td></tr>
    <tr><td class="paramname">Msg</td><td>Pointer to the structure containing transfer data.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___config.html#a4048264c3ac6b3455c0295eeacac874b">XQspiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_qspi_psu___msg.html#a420a0720c6eb8d77aae09c829185b160">XQspiPsu_Msg::ByteCount</a>, <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="struct_x_qspi_psu.html#ae6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a>, <a class="el" href="struct_x_qspi_psu___msg.html#a95b9e43bb920ea5055db6b1971d7f780">XQspiPsu_Msg::RxAddr64bit</a>, <a class="el" href="struct_x_qspi_psu.html#ac45ddbc82ca891a58fbc9f25150fce30">XQspiPsu::RxBytes</a>, <a class="el" href="group__qspipsu.html#ga3b9c82ef758ea9e8bfda707130051091">XQSPIPSU_QSPIDMA_DST_ADDR_OFFSET</a>, and <a class="el" href="group__qspipsu.html#ga584ee0482b95d3f49353438ca58fb180">XQspiPsu_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#gad77b041e10c03756bd0e3c197a63a2e3">XQspiPsu_RXSetup()</a>.</p>

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          <td class="memname">void XQspiPsu_SetupRxDma </td>
          <td>(</td>
          <td class="paramtype">const <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *&#160;</td>
          <td class="paramname"><em>Msg</em>&#160;</td>
        </tr>
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          <td></td>
          <td>)</td>
          <td></td><td></td>
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<p>Sets up the RX DMA operation. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance. </td></tr>
    <tr><td class="paramname">Msg</td><td>Pointer to the structure containing transfer data.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___config.html#a4048264c3ac6b3455c0295eeacac874b">XQspiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_qspi_psu___msg.html#a420a0720c6eb8d77aae09c829185b160">XQspiPsu_Msg::ByteCount</a>, <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="struct_x_qspi_psu___config.html#a400769b796e581c883c34c63320c51b3">XQspiPsu_Config::IsCacheCoherent</a>, <a class="el" href="struct_x_qspi_psu.html#ae6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a>, <a class="el" href="struct_x_qspi_psu___msg.html#a1fb697c64fd14580822f4baf50f26df1">XQspiPsu_Msg::RxBfrPtr</a>, <a class="el" href="struct_x_qspi_psu.html#ac45ddbc82ca891a58fbc9f25150fce30">XQspiPsu::RxBytes</a>, <a class="el" href="group__qspipsu.html#ga3b9c82ef758ea9e8bfda707130051091">XQSPIPSU_QSPIDMA_DST_ADDR_OFFSET</a>, and <a class="el" href="group__qspipsu.html#ga584ee0482b95d3f49353438ca58fb180">XQspiPsu_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#gad77b041e10c03756bd0e3c197a63a2e3">XQspiPsu_RXSetup()</a>.</p>

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          <td class="memname">void XQspiPsu_SetWP </td>
          <td>(</td>
          <td class="paramtype">const <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Value</em>&#160;</td>
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          <td>)</td>
          <td></td><td></td>
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<p>Sets the Write Protect and Hold options for the QSPIPSU device driver. </p>
<p>The device must be idle rather than busy transferring data before setting Write Protect and Hold options.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance. </td></tr>
    <tr><td class="paramname">Value</td><td>Value of the WP_HOLD bit in configuration register</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>This function is not thread-safe. This function can only be used with single flash configuration and x1/x2 data mode. This function cannot be used with x4 data mode and dual parallel and stacked flash configuration. </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___config.html#a4048264c3ac6b3455c0295eeacac874b">XQspiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="struct_x_qspi_psu.html#ad253a7c807935d5b3178966e74f6821c">XQspiPsu::IsBusy</a>, <a class="el" href="struct_x_qspi_psu.html#ae6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a>, <a class="el" href="group__qspipsu.html#ga1d76a2f706f3988da79345132e484303">XQSPIPSU_CFG_OFFSET</a>, <a class="el" href="group__qspipsu.html#gab88bcdb0f53b21b79cd0805cfd14cb89">XQspiPsu_ReadReg</a>, and <a class="el" href="group__qspipsu.html#ga584ee0482b95d3f49353438ca58fb180">XQspiPsu_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xqspipsu__write__protect__example_8c.html#a191ca904211eda1c8b5dddc5e6a16331">QspiPsuWriteProtectFlashExample()</a>.</p>

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          <td class="memname">s32 XQspiPsu_StartDmaTransfer </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *&#160;</td>
          <td class="paramname"><em>Msg</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>NumMsg</em>&#160;</td>
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          <td></td>
          <td>)</td>
          <td></td><td></td>
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<p>Starts a DMA transfer. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance. </td></tr>
    <tr><td class="paramname">Msg</td><td>Pointer to the structure containing transfer data. </td></tr>
    <tr><td class="paramname">NumMsg</td><td>Number of messages to be transferred.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if successful.</li>
<li>XST_FAILURE if ByteCount is greater than XQSPIPSU_DMA_BYTES_MAX.</li>
<li>XST_DEVICE_BUSY if a transfer is already in progress.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___config.html#a4048264c3ac6b3455c0295eeacac874b">XQspiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="struct_x_qspi_psu___msg.html#a2c11ea724a05dd7d68b8e4adcb7ac46e">XQspiPsu_Msg::Flags</a>, <a class="el" href="struct_x_qspi_psu.html#ad253a7c807935d5b3178966e74f6821c">XQspiPsu::IsBusy</a>, <a class="el" href="struct_x_qspi_psu.html#a159f22a8fb11877c4b4b2888d8153fd2">XQspiPsu::IsManualstart</a>, <a class="el" href="struct_x_qspi_psu.html#ae6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a>, <a class="el" href="group__qspipsu__api.html#ga02055aef4b0f9a801005ebdc7b556157">MAX_DELAY_CNT</a>, <a class="el" href="struct_x_qspi_psu.html#a29f89d26e8b2046a17065912e1a7b365">XQspiPsu::Msg</a>, <a class="el" href="struct_x_qspi_psu.html#abcf49b02b0b90a7eecf9fb5ba40ac0b3">XQspiPsu::ReadMode</a>, <a class="el" href="struct_x_qspi_psu.html#a489eab59d93d119fe5776f8d440ec2bd">XQspiPsu::TxBytes</a>, <a class="el" href="group__qspipsu.html#ga1d76a2f706f3988da79345132e484303">XQSPIPSU_CFG_OFFSET</a>, <a class="el" href="group__qspipsu__api.html#gafa633d08d4bcacadc20f2696665edb75">XQSPIPSU_DMA_BYTES_MAX</a>, <a class="el" href="group__qspipsu__api.html#ga08036c2fa8996e246d9d529fd2302af9">XQspiPsu_GenFifoEntryData()</a>, <a class="el" href="group__qspipsu.html#gadae24d033fb12577e3e4eda5427a950a">XQSPIPSU_ISR_OFFSET</a>, <a class="el" href="group__qspipsu__api.html#gacdde904168f5899e4ba6ccd59c360849">XQSPIPSU_MSG_FLAG_RX</a>, <a class="el" href="group__qspipsu__api.html#ga6e5ef224ee243dc64228ad60155a3f8b">XQSPIPSU_READMODE_DMA</a>, <a class="el" href="group__qspipsu__api.html#gafd11c8b8f44530c3670d2ac7497fb2fc">XQSPIPSU_READMODE_IO</a>, <a class="el" href="group__qspipsu.html#gab88bcdb0f53b21b79cd0805cfd14cb89">XQspiPsu_ReadReg</a>, and <a class="el" href="group__qspipsu.html#ga584ee0482b95d3f49353438ca58fb180">XQspiPsu_WriteReg</a>.</p>

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          <td class="memname">void XQspiPsu_TXRXSetup </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *&#160;</td>
          <td class="paramname"><em>Msg</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32 *&#160;</td>
          <td class="paramname"><em>GenFifoEntry</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
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<p>Checks the TX/RX buffers in the message and setups up the GENFIFO entries, TX FIFO, or RX DMA as required. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance. </td></tr>
    <tr><td class="paramname">Msg</td><td>Pointer to the structure containing transfer data. </td></tr>
    <tr><td class="paramname">GenFifoEntry</td><td>Pointer to the variable in which GENFIFO mask is returned to calling function</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___msg.html#a2c11ea724a05dd7d68b8e4adcb7ac46e">XQspiPsu_Msg::Flags</a>, <a class="el" href="struct_x_qspi_psu.html#ae6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a>, <a class="el" href="struct_x_qspi_psu.html#a5464cdad6cf047e5228f13cb3a761c3f">XQspiPsu::RecvBufferPtr</a>, <a class="el" href="struct_x_qspi_psu.html#ac45ddbc82ca891a58fbc9f25150fce30">XQspiPsu::RxBytes</a>, <a class="el" href="struct_x_qspi_psu.html#a2a11cb56ad7d4b388a4669359156ab0b">XQspiPsu::SendBufferPtr</a>, <a class="el" href="struct_x_qspi_psu.html#a489eab59d93d119fe5776f8d440ec2bd">XQspiPsu::TxBytes</a>, <a class="el" href="group__qspipsu__api.html#gacdde904168f5899e4ba6ccd59c360849">XQSPIPSU_MSG_FLAG_RX</a>, <a class="el" href="group__qspipsu__api.html#gae82f60c2162c93b8e302125914d8aab6">XQSPIPSU_MSG_FLAG_TX</a>, <a class="el" href="group__qspipsu__api.html#gad77b041e10c03756bd0e3c197a63a2e3">XQspiPsu_RXSetup()</a>, and <a class="el" href="group__qspipsu__api.html#ga58406ccb7e182a93cd3a47c060de091e">XQspiPsu_TXSetup()</a>.</p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#ga08036c2fa8996e246d9d529fd2302af9">XQspiPsu_GenFifoEntryData()</a>.</p>

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          <td class="memname">void XQspiPsu_TXSetup </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *&#160;</td>
          <td class="paramname"><em>Msg</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
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<p>Checks the TX buffer in the message and setup the TX FIFO as required. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the <a class="el" href="struct_x_qspi_psu.html" title="The XQspiPsu driver instance data. ">XQspiPsu</a> instance. </td></tr>
    <tr><td class="paramname">Msg</td><td>Pointer to the structure containing transfer data.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___msg.html#a420a0720c6eb8d77aae09c829185b160">XQspiPsu_Msg::ByteCount</a>, <a class="el" href="struct_x_qspi_psu.html#ae6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a>, <a class="el" href="struct_x_qspi_psu.html#a2a11cb56ad7d4b388a4669359156ab0b">XQspiPsu::SendBufferPtr</a>, <a class="el" href="struct_x_qspi_psu___msg.html#a09fc20d95cb26f29a649207d0b495f58">XQspiPsu_Msg::TxBfrPtr</a>, <a class="el" href="struct_x_qspi_psu.html#a489eab59d93d119fe5776f8d440ec2bd">XQspiPsu::TxBytes</a>, and <a class="el" href="group__qspipsu__api.html#gaf5c0853d67052b9b05af03946e51c4c2">XQspiPsu_FillTxFifo()</a>.</p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#ga8b201a022bb63afbaaf9afad23064761">XQspiPsu_TXRXSetup()</a>.</p>

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          <td class="memname">void XQspiPsu_WriteProtectToggle </td>
          <td>(</td>
          <td class="paramtype">const <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Toggle</em>&#160;</td>
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          <td>)</td>
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<p>Enables/disables Write Protect pin on the flash parts. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the QSPIPSU driver component to use.</td></tr>
    <tr><td class="paramname">Toggle</td><td>Value of the GPIO pin</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>By default, the Write Protect pin as per the QSPI controller is driven High which means no write protection. Calling this function once will enable the protection. </dd></dl>

<p>References <a class="el" href="struct_x_qspi_psu___config.html#a4048264c3ac6b3455c0295eeacac874b">XQspiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_qspi_psu.html#a9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a>, <a class="el" href="struct_x_qspi_psu___config.html#aa771e1e018426eb1f68fe5241ed45e71">XQspiPsu_Config::ConnectionMode</a>, <a class="el" href="struct_x_qspi_psu.html#ae6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a>, <a class="el" href="group__qspipsu__api.html#ga19d7a74e6402f4ba3cd33fe08602447d">XQSPIPSU_CONNECTION_MODE_SINGLE</a>, <a class="el" href="group__qspipsu.html#gad50a54ee932051b2fed093ef6f2e8a12">XQSPIPSU_GPIO_OFFSET</a>, and <a class="el" href="group__qspipsu.html#ga584ee0482b95d3f49353438ca58fb180">XQspiPsu_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xqspipsu__write__protect__example_8c.html#a191ca904211eda1c8b5dddc5e6a16331">QspiPsuWriteProtectFlashExample()</a>.</p>

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<h2 class="groupheader">Variable Documentation</h2>
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          <td class="memname"><a class="el" href="struct_x_qspi_psu___config.html">XQspiPsu_Config</a> XQspiPsu_ConfigTable[XPAR_XQSPIPSU_NUM_INSTANCES]</td>
        </tr>
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<b>Initial value:</b><div class="fragment"><div class="line">= {</div>
<div class="line">        {</div>
<div class="line">                XPAR_XQSPIPSU_0_DEVICE_ID, </div>
<div class="line">                XPAR_XQSPIPSU_0_BASEADDR,  </div>
<div class="line">                XPAR_XQSPIPSU_0_QSPI_CLK_FREQ_HZ,</div>
<div class="line">                XPAR_XQSPIPSU_0_QSPI_MODE,</div>
<div class="line">                XPAR_XQSPIPSU_0_QSPI_BUS_WIDTH,</div>
<div class="line">                XPAR_XQSPIPSU_0_IS_CACHE_COHERENT</div>
<div class="line">        },</div>
<div class="line">}</div>
</div><!-- fragment -->
<p>This table contains configuration information for each QSPIPSU device in the system. </p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#gafd84d3f23643ccbcbd4637f786ba48fa">XQspiPsu_LookupConfig()</a>.</p>

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          <td class="memname"><a class="el" href="struct_x_qspi_psu___config.html">XQspiPsu_Config</a> XQspiPsu_ConfigTable[XPAR_XQSPIPSU_NUM_INSTANCES]</td>
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<p>This table contains configuration information for each QSPIPSU device in the system. </p>

<p>Referenced by <a class="el" href="group__qspipsu__api.html#gafd84d3f23643ccbcbd4637f786ba48fa">XQspiPsu_LookupConfig()</a>.</p>

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